2019年EE362L, Fall Isolated Firing Circuit for H-Bridge Inverteree362l,秋季隔离全桥逆变触发电路.ppt

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1、1,EE462L, Spring 2013 Isolated Firing Circuit for H-Bridge Inverter (partially pre-Fall 2009 approach),2,Isolation is needed because we have three separate MOSFET source nodes, and these three nodes are ground references for the respective firing circuits,One logic signal toggles A+,A,One logic sign

2、al toggles B+,B,Vdc,(source of power delivered to load),Load,A,+,B,+,A,B,Local ground,reference for A,+,firing circuit,Local ground,reference for,B,+,firing circuit,Local ground,reference for,B,firing circuit,Local ground,reference for A,firing circuit,S,S,S,S,3,8 5,Comp,1 4,270k,Vtri,Vcont,Vcont,27

3、0k,1k,1.5k,1.5k,12V from DC-DC chip,+12V from DC-DC chip,Common (0V) from DC-DC chip,Output of the Comparator Chip,Since the comparator compares signals that can be either positive or negative, the comparator must be powered by V supply,4,8 5,Comp,1 4,270k,Vtri,Vcont,Vcont,270k,1k,1.5k,1.5k,12V from

4、 DC-DC chip,+12V from DC-DC chip,Common (0V) from DC-DC chip,Output of the Comparator Chip,Since the comparator compares signals that can be either positive or negative, the comparator must be powered by V supply,5,V(A+,A) control signal,V(B+,B) control signal,Reference (is 12V from DC-DC chip),The

5、control signals at the open-circuited output of the PWM control circuit are +24V, or 0V,When V(A+,A) is 24V, MOSFET A+ is on, MOSFET A is off When V(A+,A) is 0V, MOSFET A+ is off, MOSFET A is on,MOSFETs B+ and B work the same way with V(B+,B),6,Look for symmetry of pulse centers,Look for symmetry of

6、 pulse centers,7,O,ne,firing,circuit for each,MOSFET, with each firing,circuit mounted on a separate protoboard,.,Protoboards,A,and B,can share a power supply,and ground,. A,+,and,B,+,must each use separate power supplies,and,grounds,.,Do not connect any of these grounds to the,ground of the control

7、 circuit.,O,+,O,(,see Figure 2 for connections,),Powered by,+,12V that is,isolated,from,the,PWM,control circuit,10k,0.1F,10,1,.,2,k,MOSFET,G D S,100k,5,4,Opto,8,1,5 4,Dri,ver,8 1,Outl,ine of,protoboard,A,+,and B,+,use inverting drivers,(1426s),. A,and B,use non,-,inverting d,rivers,(1427s),. The,opt

8、ocouplers provide an additional,inversion.,g,reen,g,reen,g,reen,blue for A,+,B,+,violet for A,B,blue,blue,red,blue,Grounds,(,isolated,from control circuit,),Wait until,next week,Switching diode,14mA,Optocoupler is current-controlled. Gate current turns on the transistor, which pulls down the collect

9、or voltage.,Isolating barrier,Once the MOSFET is connected, this asymmetrical circuit will add blanking by making the turn-on slower than the turn-off. (blanking is the opposite of overlap),Overlap is the time that A+ and A are simultaneously “on,” which should be avoided. Hence, some blanking (time

10、 between one turning off and the other turning on) is desirable.,8,10k,+12V,+ Vdriver = 0V ,Isolating barrier,14mA to Opto Input Yields 0V to Input of Driver Chip, so Inverting Driver Chip Turns MOSFET ON,To driver,9,10k,+12V,+ Vdriver = 12V ,Isolating barrier,0mA to Opto Input Yields 12V to Input o

11、f Driver Chip, so Inverting Driver Chip Turns MOSFET OFF,To driver,10,We use the control signals to send 14ma through optocouplers on each of the four firing circuit boards,A+ and A are daisy chained,B+ and B are daisy chained (for complementary outputs),So, each 14mA control signal passes through t

12、wo optocouplers in series,11,24V control signals from the comparators, less 3.2V drop across two series optocoupler LEDs, and with 14mA, requires about 1.5k of resistance in series with the daisy-chained optocouplers,With 14mA, the LED of each optocoupler has about 1.6V drop,If applied half the time

13、, 24V across a 1.5k resistor would produce about 0.2W. So, it is a good idea to size up to W resistors.,12,Thus, you use W series resistors between the comparator chip and the output terminals,13,Layout of inverter control circuit and isolated firing circuits,A+ A B+ B,No MOSFETs connected yet (i.e.

14、, the drivers are open-circuited),14,Keep the 0.1F capacitors across the drivers to prevent driver failure Use the same pattern for B+ and B One DC converter chip feeds A+ Another DC converter chip feeds B+ Wall wart feeds A and B,Zoom-in view of A+ and A isolated firing circuits,15,Side view of A+

15、and A isolated firing circuit and single 12V isolated DC-DC converter chip that powers A+,Socket each single DC-DC converter chip, using one half of an 8-pin SIP socket.,Carefully break an 8-pin SIP socket in half. Do this by clamping on one-half with your long-nose pliers, and then bending the othe

16、r half down with your fingers. It should be a clean break.,16,V(A,+,A,),Opto A,+,output,Save screen,snapshot #1,0.5V,3.2V,Input and Output Voltages of Optocoupler Vcont = 0 (i.e., ma = 0) in this Snapshot,12V,0V,Opto Input (the 1.5k resistor drops the voltage from 24V to 3.2V),As expected, the opto

17、output is inverted,This phototransistor turn off delay will limit your PWM operating frequency,Look for Symmetry Among all Four Circuits,Different time-constants to avoid shoot-through (i.e. to provide a “dead-time”),17,Look for Nearly Perfect Alignment Between V(A+,A) Signal to Optocoupler, and Out

18、put of A+ Inverting Driver Chip,18,Look for Nearly Perfect Out of Phase Alignment Between V(A+,A) Signal to Optocoupler, and Output of A Non-Inverting Driver Chip,19,Now the present circuit based on PCBs:,20,Key new component: IRS21844,21,IRS21844,High output,Low output,Actual pinout,22,IRS21844 Blanking time and isolation already integrated in a single IC,

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