电力电子控制技术研究现状与前沿问题.ppt

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1、电力电子控制技术 研究现状与前沿问题 许建平 教授 西南交通大学 电气工程学院,开关DC-DC变换器控制方法,按检测信号分类 Single loop control Voltage mode control Two loop control Current mode control Peak current control Average current control Charge control V2 Control Multi loop control V2C control,开关DC-DC变换器控制方法,按占空比的实现方式(调制方式)分类 开关DC-DC变换器控制的本质是时间比率控制

2、定频控制 PWM 变频控制 PFM Constant ON time control Constant OFF time control Hysterics control,在后缘调制中,功率开关管在每个开关周期的开始导通,控制开关关断的后缘 它能够对导通时所发生的任何扰动立即做出反应 如果扰动发生在关断状态,必须等到下一个开关周期才能做出反应,存在开通延迟,后缘调制,按占空比调制方式分类_后缘调制,按占空比调制方式分类_前缘调制,在前缘调制中,功率开关管在每个开关周期的开始关断,控制开关导通的前缘 与后缘调制相比,前缘调制能够对关断时所发生的扰动进行反应 同样地,如果扰动发生在导通时,那么也

3、需要等到下一个开关周期才能进行处理, 存在关断延迟,按占空比调制方式分类 双缘调制,传统双缘调制的三角波电压VRamp 固定的:在前半个周期,VRamp下降;在后半个周期,VRamp上升。 在前半个周期,R-S触发器控制 PWM 的前缘;在后半个周期控制, R-S触发器控制 PWM的后缘。 这种调制方式仍然存在开通延时TD1(如左图)和关断延时TD2,但双缘调制的开通延时和关断延时比单缘调制的短。,存在关断延时TD2(如右图),Active Pulse Positioning Modulation Scheme,Down-ramp signal VDown_Ramp is the same a

4、s the ramp in leading-edge modulator. When the output of the error amplifier, i.e. VCOMP, is higher than the down-ramp signal, one pulse is generated to trigger the R-S flip-flop and start a PWM pulse at t1, as shown in Fig. 7(b). Once PWM goes high, another ramp signal, i.e. VUp_Ramp in Fig. 7(b),

5、starts to increase with a fixed slew rate. When the up-ramp signal VUp_Ramp reaches the VCOMP signal, it will terminate the PWM pulse at t2.,Triangle vs. Sawtooth PWM Waveform,In a fixed frequency PWM using a sawtooth waveform, a switching decision is made once per switching period based on the cont

6、rol signal level at that instant when the decision is made. A second switching action is taken at the clock pulse of the sawtooth ramp, but this is not influenced by the control signal. Thus, the duty cycle is modulated according to a single control signal sample per switching cycle. With a triangul

7、ar waveform, decisions to switch ON and OFF are each made on the basis of separate intersections of the control signal vs. the triangular waveform. The argument in favor of the triangular waveform is that since two control signal samples are taken per switching period, the PWM should be able to hand

8、le twice small signal frequency as the sawtooth PWM. Therefore a higher crossover frequency, greater bandwidth and improved performance should be attainable.,Voltage Mode Control,电压型控制电路,电压型控制主要波形图,优点: 只检测输出电压一个变量,只有一个控制环,设计和分析相对比较简单; 由于锯齿波的幅值比较大,因此抗干扰能力比较强。 缺点: 输入电压或输出电流的变化只能在输出电压改变时才能检测到并反馈回来进行纠正,

9、因此响应速度比较慢; 由于电压型控制对负载电流没有限制,因而需要额外的电路来限制输出电流。,Peak Current Control,电流型控制电路,电流型控制主要波形图,优点: 相对于电压型控制方法有更快的输入瞬态响应速度,提高了输出电压的稳压精度; 自身具有限流的功能,易于实现变换器的过流保护,因而在多个电源并联时,更便于实现均流。,工作原理: 在每个周期开始时时钟信号使锁存器复位,开关管导通, 开关电流由初始值线性增大,检测电阻Rs上的电压Vs也线性增大, 当Vs增大到误差电压Ve时,比较器翻转,使锁存器输出低电平,开关管关断, 直到下一个时钟脉冲到来开始一个新的周期。,Average

10、Current Control,工作原理: 检测电流经电流积分器积分后与误差电压Ve相减,其差值与锯齿波比较生成控制脉宽驱动开关。 优点: 提高了电流的控制精度,抗干扰性强,V2 Control,V2控制Buck变换器波形图,V2控制Buck变换器电路图,工作原理 - 在每一个开关周期开始时,时钟信号使锁存器复位、开关管导通,电感电流iL由初始值线性增大。对于开关频率的信号,电容C支路的阻抗远远小于负载R的阻抗,该变化的电感纹波电流完全流经电容C,通过滤波电容的等效串联电阻RE给滤波电容充电,从而在RE上产生与电感电流斜率相同的压降。由于电容C的容量很大,其电压Vcap可认为恒定不变,则内环的

11、检测电压为 , 当VS增大到误差电压Vc时,比较器翻转,从而使锁存器输出低电平,开关管关断,电感电流线性下降,直到下一个时钟脉冲信号到来,开始一个新的开关周期。,V2C Control,V2C控制Buck变换器电路图,V2C控制Buck变换器波形图,Hysteretic Control,滞环控制主要波形图,滞环控制原理图,滞环控制,也称为bang-bang控制或纹波调节器控制,滞环控制是一种单环、变频的控制方法。 滞环控制将输出电压维持在内部参考电压为中心的滞环宽度内:V=VH-VL。,With sub-harmonics oscillation Without sub-harmonics o

12、scillation,Sub-harmonics oscillation in ripple-based control,With sub-harmonics oscillation,Slope Compensation,Without sub-harmonics oscillation,Control techniques with slow load transient Control techniques that do not sense the load current or its changes directly, and so do not feed-forward or fe

13、ed back this signal. This is group-control with a “slow” feedback loop, because it senses the disturbance caused by the load current indirectly and uses this signal in the main feedback loop. This group improves the dynamic response by increasing the unity-gain-frequency bandwidth. Control technique

14、s with fast load transient The control techniques that does sense the output current transient directly or through the related change of the output voltage and uses this signal in a fast feedback loop or feed-forwards it to improve the transient response. The main examples of this group are:V2mode a

15、nd V2C-mode control techniques. Control approaches that do not have a fast feedback loop (which senses the load-current transient directly) require at least a few switching cycles until they start to change the duty cycle and to respond to a transient. This delay is caused by their low unity gain ba

16、ndwidth of the compensation circuitry compared to the switching frequency.,Dependence of Transient on Switching Cycle Position,The output-voltage transient response depends on where the load-current transient occurs within the switching cycle. If the load current steps down, the excessive energy sto

17、red in an output inductor is delivered to the output capacitor. The worst case for the step-down transition occurs if the transient takes place at the end of a conduction time of high-side FET, because the inductor current is at its maximum. At that moment the inductor stores the maximum energy, whi

18、le the output ripple voltage also is at its maximum. So the effect of transient is most significant at that moment, causing greater output voltage spikes than at any other moment. In contrast, the worst case for the step-up transition occurs if the transient happens at the end of the switching cycle

19、, because the inductor current and output voltage ripple are at their minimum at that moment. Only the output capacitor supplies the load during the step-up transient, while the inductor must restore its energy and current to the new load-current level.,Dependence of Transient on Switching Cycle Pos

20、ition,Worst case: Transient occurs at the end of the upper FETs conduction time.,Best case: Transient occurs at the end of the switching cycle.,Output voltage (bottom curve) and inductor current (dashed) waveforms for the different instants when the load-current (top,solid) step-down transition occu

21、rs.,缺点:无法实现单独精确控制,多输出DC-DC,隔离式普通结构的多输出DC-DC,单电感多开关多输出DC- DC,Single-Inductor Dual-Output(SIDO),当满足条件:,Single-Inductor Multiple-Output(SIMO,2019年7月15日,周涛,28,电压型PT控制SIDO Buck变换器,电压型PT控制SIDO DCM Buck变换器控制框图,电压型PT控制SIDO DCM Buck变换器控制时序图,Programmability Elimination of discrete Component tuning,2019年7月15日,

22、周涛,32,Dual-Mode System,Importance of efficiency improvement: By dynamically changing the operation of the overall power system, it is possible to achieve 4 5% gain in efficiency especially at lighter loads. By using digital technology, it is possible to change the operation of the power system in re

23、al time.,Efficiency Improvement,Boost Voltage Variation The efficiency difference of power factor correction over a wide range of AC input could be 3 to 4% depending on the set point of the Boost voltage. It is highest near the peak of the input AC source voltage. Continues monitor the AC input volt

24、age and sets the Boost voltage slightly above the peak of the AC input voltage to improve the efficiency.,Envelop Followed Power Supply,Burst Mode Operation Certain converters operate very inefficiently at light load conditions. Based on the input power drawn, the switcher goes into a burst mode to

25、improve the efficiency. Lighter the load, lower will be the burst mode frequency. Therefore at very light load, the switching losses can be minimized and thus the overall efficiency improved. Phase Shedding It improves the efficiency by dropping certain number of phases in a multiphase regulator dep

26、ending on the instructions from the processor and other devices in a system. The instruction is a function of the load for the devices. This could be called power on demand operation Gate Drive Voltage Variation For light load conditions, the switching losses dominate and a regulator driven by lower

27、 gate voltage could make a 2 3% difference in efficiency. If the gate voltage for light load condition is reduced from 12V to 5V, the efficiency improvement is 67%. An algorithm based on the power drawn can modify the gate voltages and thus achieve a much higher efficiency.,Redundant Operation A red

28、undant power system in general has a lower efficiency due to duplication of fixed overhead. Therefore, for light load conditions, most of the redundant functions are to be disabled to conserver power, and enable them only when the output power reaches to a critical threshold point. MOSFET as a Curre

29、nt Sense Device A digital firmware can store a lookup table for accurate MOSFET resistance to account for temperature and component tolerances. Thus the MOSFET resistance can be used without any additional cost and extra dissipation. In an overall power system this could make almost 1% efficiency difference.,Traditional power system structure of server,Two-stage VR with buck as the first stage,高效率电源系统架构,=98%效率、PF=0.999的无桥PFC,数字控制无桥PFC,

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