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1、Sheet 1 of 9 Reflection Oscillator Design Tutorial J P Silver E-mail: johnrfic.co.uk ABSTRACT This paper discusses the design of a basic reflection oscillator, using a distributed resonator and micro- strip circuit elements. The first design is of a fixed frequency oscillator and the second design u
2、ses a varactor for frequency tuning. Throughout the designs, Agilent ADS large and small circuits and simulations are given to verify each design stage. INTRODUCTION This tutorial describes the design of a 2GHz reflection oscillator building on the theory from the oscillator ba- sics tutorial. In th
3、e first section a simple fixed frequency oscillator is described where the resonator consists of a similar element that resonates with the input of the re- flection amplifier. The second design uses a varactor based resonator to allow frequency control of the oscil- lator to be used within a PLL. FI
4、XED FREQUENCY NEGATIVE RESISTANCE OSCILLATOR 2,3,4 For this example we wish to design an oscillator for a fixed frequency of 2GHz. The device selected for this example is the Hewlett-Packard General Purpose Silicon Bipolar Transistor AT-42535.The S-parameters at 2GHz for this device are: Bias VCE =
5、8V IC = 10mA; S11 = 0.58 155 S21 = 3.06 55 S12 = 0.062 55 S22 =0.48 -38 From the data it is clear that the device will be stable in a 50ohm system but will it have the ability to oscillate when attached to a resonant load? To answer this we need to calculate the value of K, if it is greater than one
6、 then the device will not oscillate into a resonant load and we will need to add feedback to ensure K SS2 SS-1 = D K We can simulate the FET to determine the stability fac- tor K by using ADS circuit shown resulting in the table of K factor shown inTable 1. freq 1.500GHz 1.542GHz 1.583GHz 1.625GHz 1
7、.667GHz 1.708GHz 1.750GHz 1.792GHz 1.833GHz 1.875GHz 1.917GHz 1.958GHz 2.000GHz 2.042GHz 2.083GHz 2.125GHz 2.167GHz 2.208GHz 2.250GHz 2.292GHz 2.333GHz 2.375GHz 2.417GHz 2.458GHz 2.500GHz StabFact1 1.120 1.129 1.138 1.147 1.158 1.170 1.183 1.198 1.213 1.230 1.248 1.267 1.288 1.280 1.274 1.269 1.265
8、1.262 1.260 1.259 1.259 1.260 1.263 1.267 1.272 Table 1 Resulting K factor for the FET when used in common-source mode. S_Param SP1 Step= Stop=2.5 GHz Start=1.5 GHz S-PARAMETERS StabFact StabFact1 StabFact1=stab_fact(S) StabFact sp_hp_AT-42085_1_19920721 SNP1 Frequency=“0.10 - 6.00 GHz“ Bias=“Bjt: V
9、ce=8V Ic=10mA“ Term Term2 Z=50 Ohm Num=2 Term Term1 Z=50 Ohm Num=1 Figure 1 ADS simulation circuit to determine the stability factor K From Table 1 we can see the value of K at 2GHz was was1.28 ie non-conditional stability. Therefore feed- back is needed to reduce this below 1 and this is done by ad
10、ding shunt feedback in the form of an inductor as shown in Figure 2. Sheet 2 of 9 L Figure 2 Addition of shunt feedback in the form of an inductor to modify the device S-parameters in the aim of making K less than one. If we add, for example a 5nH inductor to the emitter, we can analyse the new circ
11、uit on a Microwave/RF CAD such as Agilent ADS. Analysis gives us a set of modi- fied S-parameters and a new value of k: freq 1.500GHz 2.000GHz 2.500GHz StabFact1 0.939 0.850 0.898 freq 1.500GHz 2.000GHz 2.500GHz S(1,1) 0.429 / -11.658 0.429 / -26.387 0.418 / -17.443 S(2,1) 1.646 / 65.202 1.431 / 57.
12、680 1.220 / 52.442 S(1,2) 0.213 / 87.637 0.314 / 91.284 0.381 / 80.178 S(2,2) 0.799 / -18.613 0.820 / -25.714 0.789 / -30.357 An associated value of K of 0.85, implies that the device is now conditionally stable and may be liable to oscilla- tion. But the value of K is only just below 1 and the magn
13、itudes of S11 & S22 are still below 1 ie no nega- tive resistance. Therefore, we can try a different configuration - it is normal to use a bipolar transistor in the common base configuration as shown in Figure 3. S_Param SP1 Step= Stop=2.5 GHz Start=1.5 GHz S-PARAMETERS StabFact StabFact1 StabFact1=
14、stab_fact(S) StabFact Term Term2 Z=50 Ohm Num=2 Term Term1 Z=50 Ohm Num=1 sp_hp_AT-42085_1_19920721 SNP1 Frequency=“0.10 - 6.00 GHz“ Bias=“Bjt: Vce=8V Ic=10mA“ Figure 3 Common-Base configuration to boost negative impedance looking into the emitter and collectors. Shown in Table 2 are the new S-Param
15、eters: freq 1.500GHz 2.000GHz 2.500GHz StabFact1 -0.914 -0.802 -0.792 freq 1.500GHz 2.000GHz 2.500GHz S(1,1) 1.012 / 169.289 0.956 / 164.470 1.218 / 158.068 S(2,1) 2.057 / -29.604 2.214 / -41.140 2.313 / -54.156 S(1,2) 0.062 / 151.800 0.072 / 128.082 0.166 / 150.721 S(2,2) 1.126 / -18.784 1.230 / -2
16、6.579 1.298 / -35.052 Table 2 Common-Base S-Parameters & K factor with a 5nH inductor connected between the base and ground, now showing 1 magnitudes of S11 & S22 with the K factor 1 magnitudes of S11 & S22 with the K factor 1. If it was 1. We can therefore, attach a capacitor to the input of the de
17、vice to resonate it. Looking on a Smith chart a pure reactance of -45 degrees gives a corresponding reactance of 2.375*50 ohms (at 2GHz). Therefore, the capacitor required will be: 0.67pF = 50 * 2.375 * 2E9 * 2 1 = X2 1 = C c f We now have the values required for the basic oscillator an ADS S-parame
18、ter simulation using the osctest will confirm whether oscillation will occur. The simulation is shown inFigure 6. vb vout CAPQ C3 Mode=proportional to freq F=1000.0 MHz Q=400.0 C=0.67 pF S_Param SP1 Step= Stop=3.0 GHz Start=1.0 GHz S-PARAMETERS OscTest OscTest1 Points=101 Stop=2.1 GHz Start=1.9 GHz
19、Z=1.1 Ohm Port_Number=1 I_Probe Ic DC DC1 DC DC_Feed DC_Feed2 DC_Feed DC_Feed3 R R3 R=5370 Ohm C C2 C=100 pF R R2 R=500 Ohm R R1 R=200 Ohm V_DC SRC2 Vdc=10 V DC_Feed DC_Feed1 DC_Block DC_Block1 pb_hp_AT42085_19911003 Q1 L L1 R= L=5.0 nH Term Term2 Z=50 Ohm Num=2 Figure 6 ADS S-Parameter simulation o
20、f the basic oscillator see text for description of the simulation features. The S-parameter model has been replaced with a non- linear model (Spice model) and as a result the DC bias circuit is needed to ensure the bipolar transistor is biased to 10mA with a Vce of 8V. The 200-ohm resistor is de- si
21、gned to drop 4V to give a Vce of 8V. The emitter is grounded via the DC_feed which is a block to all RF. The base inductor is RF grounded via the 100pF capaci- tor and this is where the base voltage bias is applied. The base resistors are set to give a 10mA collector cur- rent. The Oscport block wil
22、l output the closed loop magni- tude and phase of the circuit over the frequency range specified within the Oscport block. Note the magnitude has to be 1 and have zero phase at the required fre- quency. The result of the simulation is shown in Figure 7. Sheet 4 of 9 m1 freq=2.095GHz SP1.SP.S(1,1)=1.
23、023 / -0.389 -1.0 -0.5 0.0 0.5 1.0 -1.5 1.5 freq (1.000GHz to 3.000GHz) SP1.SP.S(1,1) m1 Figure 7 Polar magnitude/phase result of the S- Paramter simulation using the Oscport block shown in Figure 6. The S-parameter simulation shows that we do achieve a magnitude of 1 at zero phase at 2GHz. Therefor
24、e the next step is to perform a harmonic balance simulation to predict the output power spectrum and phase noise per- formance. The Harmonic balance ADS simulation is shown in Figure 8. The Harmonic balance simulator box is set to the fol- lowing values: Freq: 2000MHz , order 3. Noise(1): Select Log
25、, Start 100Hz, Stop 10MHz, Points/decade 10, Select Include FM noise. Noise(2) Select “vout”, Select Non linear Noise & Os- cillator Osc Osc Port name “Osc1” All other parameters can be left to their default values. vb vout CAPQ C3 Mode=proportional to freq F=1000.0 MHz Q=400.0 C=0.55 pF I_Probe Ic
26、DC DC1 DC DC_Feed DC_Feed2 HarmonicBalance HB1 Order1=3 Freq1=2.0 GHz HARMONIC BALANCE DC_Feed DC_Feed3 R R3 R=5370 Ohm OscPort Osc1 MaxLoopGainStep= FundIndex=1 Steps=10 NumOctaves=2 Z=1.1 Ohm V= C C2 C=100 pF R R2 R=500 Ohm R R1 R=200 Ohm V_DC SRC2 Vdc=10 V DC_Feed DC_Feed1 DC_Block DC_Block1 pb_h
27、p_AT42085_19911003 Q1 L L1 R= L=5.0 nH Term Term2 Z=50 Ohm Num=2 Figure 8 Harmonic balance ADS simulation of the basic oscillator design. The resulting frequency spectrum is shown inFigure 9 with the corresponding phase noise plot shown in Figure 10. harmindex 0 1 2 3 HB.freq 0.0000 Hz 2.003GHz 4.00
28、6GHz 6.010GHz m1 harmindex=1 dBm(HB.vout)=14.841 0.51.01.5 2.0 2.5 0.03.0 5 10 15 20 25 0 30 harmindex dBm(HB.vout) m1 Figure 9 Oscillator output power spectrum. The frequency of the fundamental is given by index 1 which has a frequency of 2.003GHz and an output power of 14.8dBm. Note to give the co
29、rrect fre- quency the tuning capacitor on the bipolar emitter junction was slightly lowered from 0.67pF to 0.55pF. Sheet 5 of 9 m2 noisefreq=10.01kHz pnfm=-76.10 dBc 1E 3 1E 4 1E 5 1E 6 1E 7 1E 2 2E 7 -140 -120 -100 -80 -60 -40 -160 -20 noisefreq, Hz pnfm, dBc m2 Figure 10 Phase noise prediction of
30、the basic oscil- lator design. The next stage of the design is to replace some of the circuit elements with micro-strip lines, specifically the tuning capacitor, shunt inductor and RF bias circuits (as shown by the DC_Feeds). (1) Calculate 5nH inductor as an open-circuit stub. degrees 142 9051.5 90t
31、an ie get to Rearrange 4 9090 )Stub Circuit SHORT( tan & STUB) Circuit (OPEN 90tan 62.8 .5.0E.2.0E2 .2X Reactance 1 00 99 L Zo X Where ZoLX ZoLX f.L L op (2) Calculate 0.55pF capacitor as an open-circuit stub. 4 9090 Where degrees 19 Xc.Zotan Zo tan C 069.0.0.55EE22 C op 00 1 129 . (3) DC_Feed Use 9
32、0 degree 90 ohm lines. (4) DC_Capacitor shunts Use 90 degree 20 ohm lines The ADS model was updated to use ideal micro-strip lines and open-circuit stubs as shown in Figure 11. These ideal components can be easily converted to real micro-strip lines by running Linecalc in ADS to allow design of the
33、oscillator layout. The following section will now deal with a variable fre- quency oscillator. vb vout I_Probe Ic TLOC TL8 F=2 GHz E=90 Z=20.0 Ohm Re f V_DC SRC2 Vdc=10 V HarmonicBalance HB1 Order1=3 Freq1=2.0 GHz HARMONIC BALANCE TLIN TL5 F=2 GHz E=90 Z=90.0 Ohm TLOC TL2 F=2 GHz E=18 Z=50.0 Ohm Re
34、f OscPort Osc1 MaxLoopGainStep= FundIndex=1 Steps=10 NumOctaves=2 Z=1.1 Ohm V= TLOC TL7 F=2 GHz E=90 Z=20.0 Ohm Re f TLIN TL3 F=2 GHz E=90 Z=90.0 Ohm TLIN TL4 F=2 GHz E=90 Z=90.0 Ohm TLOC TL1 F=2 GHz E=139 Z=50.0 Ohm Ref DC DC1 DC R R3 R=5370 Ohm R R2 R=500 Ohm R R1 R=200 Ohm DC_Block DC_Block1 pb_h
35、p_AT42085_19911003 Q1 Term Term2 Z=50 Ohm Num=2 Figure 11 ADS schematic of the reflection oscillator with ideal microstrip RF bias lines, capacitors and inductors fitted. VARIABLE FREQUENCY NEGATIVE RESISTANCE OSCILLATOR 2,3,4 In the following section the design of a varactor con- trolled variable f
36、requency negative resistance oscillator is given. This design example will use the same device and RF circuitry used in the fixed frequency version. In order to pick a suitable varactor for the design we need to decide on the tuning bandwidth. This particular requirement is for a tuning bandwidth of
37、 20MHz/V over the tuning range of 1 to 10V. To give us a bit of margin to cover temperature effects etc we pick a bandwidth of 25MHz/V. The varactor should have minimal case parasitics so we opt for a SMT package device. The equivalent circuit of a typical varactor together with the package parasiti
38、cs is shown in Figure 12. Sheet 6 of 9 Cj Rs Ls Cp Figure 12: Typical equivalent circuit of a varactor diode. The series inductor Ls and parallel capacitor Cp are package parasitics, typical values are Cp 0.1pF and Ls = 1.5nH. The general equation for calculating the capacitance of the varactor is:
39、ecapacitanc diode V C exponent eCapacitanc = 0.7V)( potential contact junction= J V voltage, applied = R V ecapacitanc diode V C :where P C J V R V 1 J C V C For the Macom MA46506 varactor diode, is 1.0pF at 4V with a Gamma of = 0.5. At 1V, CV = 1.66pF & at 10V, CV = 0.66pF From the fixed frequency
40、oscillator we can calculate the inductance of the input of the reflection oscillator as: 11.5nH 0.55E .2E2. 1 C .f2. 1 L 12- 2 9 2 By rearranging the varactor equation we can find CJ by using the data CV=1.0pF at 4V. This will give a value of CJ 2.39pF The easiest way to determine the value of the c
41、oupling capacitor is to generate a spreadsheet and enter values of Varactor coupling capacitor, Max & Min voltage, Gamma, CJ and resonator inductance as shown in Table 4. From the entered value of Capactance at 4V and Gamma we can calculate CJ by rearranging the varactor formula using VR as 4V and V
42、J as 0.7V. Then by using CJ and entering the two control voltages, we can calculate the maximum and minimum varactor capacitances. We then assume that the coupling capacitor will be in series with the varactor and therefore, with different coupling capacitors we can calculate the new max & min varac
43、tor capacitances. By entering the inductor we can calculate the max & min resonator frequencies and tuning bandwidth. From Table 4 we can see that if we pick a varactor cou- pling capacitor of 0.4pF then we should achieve our tuning bandwidth (with margin) of 25MHz/V. Note also that we need a total
44、inductance of 30nH in- cluding the inductance of 11.5nH looking into the re- flection amplifier. Therefore an inductance of 18.5nH needs to be initially added in series with the varactor. Table 4 Showing the resulting tuning ranges for the varactor and coupling capacitor combinations. To achieve 25M
45、Hz/V we use a series capacitor of 0.4pF in series with the varactor. Note also that we need a total inductance of 30nH including the in- ductance of 11.5nH looking into the reflection am- plifier. These resonator components were added to the harmonic balance ADS schematic as shown in Figure 13. Note
46、 the inductor has been reduced to adjust the frequency to 2GHz at the mid control voltage (ie Cvaractor = 1pF). Sheet 7 of 9 vout DC DC1 DC HarmonicBalance HB1 Order1=3 Freq1=2.0 GHz HARMONIC BALANCE C C3 C=1.6 pF L L1 R= L=11.0 nH C C5 C=0.5 pF L L2 R= L=4.0 nH R R2 R=500 Ohm DC_Block DC_Block1 DC_
47、Feed DC_Feed3 DC_Feed DC_Feed2 DC_Feed DC_Feed1 R R3 R=5370 Ohm C C4 C=100 pF R R1 R=200 Ohm V_DC SRC2 Vdc=10 V OscPort Osc1 MaxLoopGainStep= FundIndex=1 Steps=10 NumOctaves=2 Z=1.1 Ohm V= pb_hp_AT42085_19911003 Q1 I_Probe Ic Term Term1 Z=50 Ohm Num=1 Figure 13 ADS schematic of the Voltage Controlle
48、d Oscillator (VCO). The varactor is represented by C3 which is set to 0.66pF (for 10V control voltage) and 1.66pF (for 10V control voltage). The simulation was run with the min & max varactor capacitances resulting in the plots shown in Figure 14 and Figure 15 respectively. m1 harmindex=1 dBm(HB.vou
49、t)=14.315 0.5 1.0 1.5 2.0 2.5 0.0 3.0 0 10 20 -10 30 harmindex dBm(HB.vout) m1 harmindex 0 1 2 HB.freq 0.0000 Hz 1.897GHz 3.793GHz m2 noisefreq=10.01kHz pnfm=-87.96 dBc 1E 3 1E 4 1E 5 1E 6 1E 7 1E 2 2E 7 -140 -120 -100 -80 -60 -160 -40 noisefreq, Hz pnfm, dBc m2 Figure 14 Simulation plots of the ADS schematic shown in Figure 13, showing output power, frequency & phase noise performance with the varactor set to 1V. m1 harmindex=1 dBm(HB.vout)=15.987 0.51.01.5 2.0 2.50.03.0 -10 0 10 20 -20 30 harmindex dBm(HB.vout) m1 harmindex 0 1 2 HB.f