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1、ERRATA EIA RS-408 “INTERFACE BETWEEN NUMERIAL CONTROL EQUIPMENT AND DATA TERMINAL EQUIPMENT EMPLOYING PARALLEL BINARY DATA INTERCHANGE“ TABLE 3.1. Page 8 Under Reference No. 9, the Pin-.Number for Circuit AB1 should read “E“ instead of “F.“ P l e a s e make the above correction to your copy of the p
2、ublished Standard. 8/13/73 Copyright Government Electronics however, the requirements of section 2.7 must also be satisfied. In the binary ONE state the current (IT) in the interchange circuit shall be equal to or less than 1.2 milliamperes when V 1 is +2.4 volts. In the binary ZERO state the curren
3、t (IF) required in the interchange circuit shall be equal to or less than 48 milliamperes. I I INTERFACE POINT VOLTAGE I INTERCHANGE LOGIC STATES TABLE 2.2 2.4 The effective shunt capacitance (C,) of the terminator side of an interchange circuit, measured at the interface point shall not exceed 2000
4、 picofarads for terminators in Data Terminal Equipment, nor 500 picofards for terminators in Numerical Control Equipment, (NOTE: Interface connector located within NCE cabinet). The reactive component of the load impedance shall not be inductive. The open circuit terminator voltage shall pull up to
5、a level 2 2.4 and 5.25 volts in magnitude. - 2.5 The open-circuit driver voltage (Vo) with respect to Circuit AB (Signal Ground) on any inter- change circuit shail not exceed 5.25 volts in magnitude. The source impedance (Ro and CO) of the driver side of an interchange circuit including any cable to
6、 the interface point is not specified; how- ever, the combination of VO and RO shall be selected such that a short circuit between any two conductors (including ground) in the interconnecting cable shall not result in a current in excess of one-half ampere. 2.6 The characteristics of the interchange
7、 signals transmitted across the interface point exclusive of external interference shall conform to the limitations specified in this section. These limitations shall be satisfied at the interface point when the interchange circuit is terminated with any receiving circuit Copyright Government Electr
8、onics & Information Technology Association Provided by IHS under license with GEIA Licensee=IHS Employees/1111111001, User=Wing, Bernie Not for Resale, 03/31/2007 00:10:41 MDTNo reproduction or networking permitted without license from IHS -,-,- E I A 408 73 m 3234600 00b7983 5 m RS-408 Page 7 which
9、 meets the requirements given in Section 2.4. These limitations apply to all interchange signals unless otherwise specified. a l. All interchange signals entering into the transition region shall proceed through the transition region to the opposite signal state and shall not reenter the transition
10、region until the next signifi- cant change of signal condition. 2. There shall be no reversal of the direction of voltage while the signal is in the transition region. 3. The time required for the interchange signals to pass through the transition region during a change in state shall not exceed one
11、 microsecond. 2.7 The following interchange circuits, where implemented, shall be used to detect either a power-off condition in the equipment connected across the interface, or the disconnection of the intercon- necting cable: Circuit CC1 2 (DATA TERMINAL STATUS) Circuit CD 13 (NUMERICAL CONTROL ST
12、ATUS) The terminator for these circuits shall interpret the power-off condition or the disconnection of the interconnecting cable as the binary ONE state of the Data Terminal Status and Numerical Control Status signals. a 3. INTERFACE MECHANICAL CHARACTERISTICS 3.1 The interface between the data ter
13、minal equipment and numerical control equipment is located at a pluggable connector signal interface point between the two equipments. The female connector shall be associated with and shall be physically attached to the numerical control equipment and should be mounted in a fixed position near a ca
14、ble entry opening in the cabinet. The female connector shall be an MS3 102A36-8S general purpose box mounting receptacle, or equiv- alent, having 46 - #16 contacts and 1 - #12 contact. A cable with a male connector shall be provided with the data terminal equipment. The length of the cable shall be
15、such that the resulting load capacitance (CL of Figure 2. i), measured at the interface point and including the signal terminator, does not exceed the value specified in Section 2.4. The male connector shall be an MS3 106A36-8P cable connecting plug, or equivalent, matching the female connector. 3.2
16、 Pin Identification 3.2.1 Pin assignments listed in Table 3.1 shall be used. 3.2.2 Pin assignments for circuits not specifically defined in Section 4 (see 4.1.1) are to be made by mutual agreement. Copyright Government Electronics & Information Technology Association Provided by IHS under license wi
17、th GEIA Licensee=IHS Employees/1111111001, User=Wing, Bernie Not for Resale, 03/31/2007 00:10:41 MDTNo reproduction or networking permitted without license from IHS -,-,- E I A 408 73 3234b00 OOb7984 7 Ref. RS-408 Page 8 Pin Number 1 2 3 4 5 6 7 A L R e t V m BA1 BA2 BA3 BA4 BA5 BA6 BA7 BA8 AB1 AB2
18、AB3 AB4 AB5 AB6 AB7 AB8 AC 1 AC2 AC3 P lo 11 I a Track 1 Data Track 2 Data Track 3 Data Track 4 Data Track 5 Data Track 6 Data Track 7 Data Track 8 Data Track 1 Signal Ground Track 2 Signal Ground Track 3 Signal Ground Track 4 Signal Ground Track 5 Signal Ground Track 6 Signal Ground Track 7 Signal
19、Ground Track 8 Signal Ground Track 1 Shield Track 2 Shield Track 3 Shield 8 9 14 15 16 17 18 19 f F X n W F H V 12 j 13 Y 20 21 22 23 24 25 26 27 r W Z S b Y I S 46 47 AC4 Circuit 1 Description Track 4 Shield AC5 Track 5 Shield AC6 AC7 AC8 AA CA9 AB9 AC9 CB1 O AB10 AC10 CBll AB1 1 AC1 1 cc12 AB12 AC
20、12 CD13 AB1 3 AC13 CE14 AB14 AC14 CE1 5 AB1 5 AC15 Track 6 Shield Track 7 Shield Track 8 Shield Protective Ground Data Available Signal Ground for CA9 Shield Ground for CA9 & AB9 Data Request Forward - Char. by Char. Signal Ground for CBl O Shield Ground for CBIO & AB10 Data Request Forward - Block
21、by Block Signal Ground for CB 1 1 Shield Ground for CBl 1 & AB1 1 Data Terminal Status Signl Ground for CB12 Shield Ground for CC12 & AB12 Numerical Control Status Signal Ground for CD13 Shield Ground for CD13 & AB13 Data Request Reverse - Block by Block Signal Ground for CE14 Shield Ground for CE14
22、 & AB14 Data Request Reverse - Char. by Char. Signal Ground for CE1 5 Shield Ground for CE1 5 & AB 15 INTERFACE CONNECTOR PIN ASSIGNMENTS TABLE 3.1 28 N 29 B 30 31 32 33 D G J T 34 35 O K 40 41 d C - Unassigned Copyright Government Electronics & Information Technology Association Provided by IHS und
23、er license with GEIA Licensee=IHS Employees/1111111001, User=Wing, Bernie Not for Resale, 03/31/2007 00:10:41 MDTNo reproduction or networking permitted without license from IHS -,-,- I - EIA 408 73 m 3234600 O067985 9 m RS-408 Page 9 4. FUNCTIONAL DESCRIPTION OF INTERCHANGE CIRCUITS 4.1 General - T
24、his section defines the basic interchange circuits. 4.1.1 Additional interchange circuits not defined herein, or variations in the functions of the defined interchange circuits may be provided by mutual agreement. See 3.2.2. 4.2 Categories of Circuits Interchange circuits between data terminal equip
25、ment and the numerical control equipment fall into three general categories: Ground or Return, Data, and Control as shown in Table 4.1. 4.3 Signal Characteristics, General 4.3.1 Interchange circuits transferring data signals across the interface point shall hold binary ONE or binary ZERO conditions
26、for the total nominal duration as shown in Figure 4.2. 4.3.2 For the purpose of preventing generation of incorrect or undersirable control and data signals the terminator input circuits shall be designed to assume the binary ONE state when opened due to a disconnected cable. (See Paragraph 2.7). The
27、refore, each signal across the inter- face shall be in the binary ZERO state when active. Note that while circuits are named CA9, etc., the signals appearing on those circuits are named DATA AVAILABLE, etc., the bar signifying that the signal is in the binary ZERO state when active. 4.4 Overall Sequ
28、ence of Operation The signals Data Terminal Status on Circuit CCl2 and Numerical Control Status on CD 13 are ini- tiating signals in that no data transfer to the numerical control shall take place unless the signals on both of these circuits are in the ZERO state. These status signals will remain in
29、 the ZERO state during the normal operating cycle or cycles of the numerical control. The specific conditions will will cause the signal on circuit CC 12 or circuit CD 13 to go to the ONE state may be different for each system. In general, the signal on circuit CD13 will go to the ZERO state immedia
30、tely before an operating cycle or cycles. It will remain ZERO until the cycle or cycles are completed. The signal on circuit CC12 will normally remain in the ZERO state until the signal on circuit CD 13 goes to the ONE state. With the signals on circuits CC 12 and CD 13 in the ZERO state, a Data Req
31、uest may be initiated by the numerical control either on circuit CB 1 O (Data Request Forward - Character by Character) or on circuit CB 1 1 (Data Request Forward - Block by Block). 4.4.1 Data Request Forward - Character by Character With the signals on circuits CC 12 and CD 13 in the ZERO state, th
32、e numerical control may re- quest data by initiating a Data Request signal on circuit CB 10. The Data Request signal will Copyright Government Electronics & Information Technology Association Provided by IHS under license with GEIA Licensee=IHS Employees/1111111001, User=Wing, Bernie Not for Resale,
33、 03/31/2007 00:10:41 MDTNo reproduction or networking permitted without license from IHS -,-,- E I A 408 73 3234600 00b798b O m RS-408 Page 10 - B Data Reauest Forward 1 O Char. by Char. (Where used) CBIO I I I +I Data Request Forward 4 F.7 7 5 4 1 O - Data Available I Block by Block (Where used) CB
34、11 I 1 CA9 I O Data Data Track One Duration I I 1 1 I I I 1 O BA1 Il I Data Track Two II I 1 I I O BA2 I etc. (typical) i I I .I I l BA8 II p I I I Data Track Eight 1 II O I I I I I Reader Run Fwd I I I I I II I I I I I Sprocket I I t, and t2 determined by control builder Several 1 Characters Durati
35、on 1Iiii-r Note 1 : Rice and fall times between logic states shall not exceed 1 microsecond for I - I interchange circuits. represent data in an indeterminate state. End of Block I I I I I TIMING DIAGRAM FIGURE 4.2 Copyright Government Electronics & Information Technology Association Provided by IHS
36、 under license with GEIA Licensee=IHS Employees/1111111001, User=Wing, Bernie Not for Resale, 03/31/2007 00:10:41 MDTNo reproduction or networking permitted without license from IHS -,-,- Interchange Circuit Description AA Protective Ground AC 1 -AC1 3 AI31-AB13 Signal Ground/Return Shield Ground IN
37、TERCHANGE CIRCUITS BY CATEGORY GND DATA CONTROL 4 X X X TABLE 4.1 - remain on circuit CB10 until valid data is available on circuits BA1 thru BA8 and a Data Available signal is initiated by the data terminal on circuit CA9. The Data Available signal from the data terminal will signal the numerical c
38、ontrol to remove the Data Request signal. The data will remain on circuits BA1 thru BA8 until the numerical control initiates the next Data Request signal on circuit CB 1 O. A timing diagram of the Data Request and Data Available signals as herein described, and showing the maximum/minimum timing as
39、 required in Section 4.5, is shown in Figure 4.2. 4.4.2 Data Request Forward - Block by Block With the signals on circuits CC 12 and CD 13 in the ZERO state, the numerical control may request data by initiating a Data Request signal on circuit CB 1 1. The Data Request signal will remain on circuit C
40、B 1 1 until the next End of Block character is recognized by the NCE. The Data Terminal Equipment will present on circuit CA9 a Data Available signal for each character in the block in sequence as the data becomes valid on circuits BA1 through BA8, ending with the End of Block character. The data sh
41、all be presented at a rate adjustable over the range of 50 to 10,000 characters per second for block by block transfer. a RS-408 Page 11 Copyright Government Electronics & Information Technology Association Provided by IHS under license with GEIA Licensee=IHS Employees/1111111001, User=Wing, Bernie
42、Not for Resale, 03/31/2007 00:10:41 MDTNo reproduction or networking permitted without license from IHS -,-,- EIA 408 73 3234b00 00b798 4 RS-408 Page 12 4.5 Interchange Circuits - Definitions Circuit AA - Protective Ground Direction: Not applicable This conductor shall be electrically bonded to the
43、machine or equipment frame. It may be further connected to external grounds as required by applicable regulations. Circuit ABI - through AB13 - Signal Ground or Return Direction: Not applicable These conductors establish the ground reference potential for interchange circuits. Within the data termin
44、al equipment, these circuits shall be brought to one point, and it shall be possible to connect this point to Circuit AA by means of a wire strap inside the equipment. This wire strap can be con- nected or removed at installation, as may be required to meet applicable regulations or to minimize the
45、introduction of noise into electronic circuitry. Circuit AC1 through AC1 3 - Shield Ground Direction: Not applicable These connector pins are used when it is desired to provide continuous cable shield circuits thru the interface connector. Circuits BAI through BA8 - Numerical Control Data Direction:
46、 To numerical control These circuits are electrically identical and carry the data required by the numerical control to direct the operation of the machine tool or other controlled equipment. They correspond to tracks 1 thni 8 of the alternate tape reader signals to the numerical control. The numeri
47、cal control accepts and utilizes these data signals as required by the numerical control and as directed by the control signals on circuits CA9 (Data Available) and CC12 (Data Term. Status). The corresponding signal states on circuits BA1 through BA8 are: Conventional Binary Punched Tape State at In
48、terface No Hole ONE Hole ZERO Circuit CA9 - Data Available Direction: To numerical control The Data Available signal on circuit CA9 is a pulse to the ZERO state which immediately follows the Copyright Government Electronics & Information Technology Association Provided by IHS under license with GEIA Licensee=IHS Employees/1111111001, User=Wing, Bernie Not for Resale, 03/31/2007 00:10:41 MDTNo reproduction or networking permitted without license from IHS -,-,- EIA 408 73 m 3234600 O067787 6 m 1 - - RS-408 Page 13 - transfer of data from the Data Terminal to circuits BA1