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1、 ITAA STANDARD GEIA-STD-0005-3 Performance Testing for Aerospace and High Performance Electronic Interconnects Containing Pb-free Solder and Finishes GEIA-STD-0005-3 June 2008 INFORMATION TECHNOLOGY ASSOCIATION OF AMERICA Copyright Government Electronics it is especially disruptive to aerospace and
2、other industries that produce electronic equipment for high performance applications. These applications, hereinafter described as AHP (Aerospace and High Performance), are characterized by severe or harsh operating environments, long service lifetimes, and high consequences of failure. In many case
3、s, AHP electronics must be repairable at the soldered assembly level. Typically, AHP industry production volumes may be low and, due to low market share, may not be able to resist the change to Pb-free. Furthermore, the reliability tests conducted by suppliers of solder materials, components, and su
4、b-assemblies cannot be assumed to assure reliability in AHP applications. This document provides guidance (and in some cases direction) to designers, manufacturers, and maintainers of AHP electronics in assessing performance of Pb-free interconnections. Over the past several decades, electronics man
5、ufacturers have developed methods to conduct and interpret results from reliability tests for lead-bearing solder alloys. Since these alloys have been used almost universally in all segments of the electronics industry, and since a large body of data, knowledge, and experience has been assembled, th
6、e reliability tests for Pb-bearing solder alloys are well-understood and widely accepted. ii Copyright Government Electronics instead, a number of alloys are being used in various segments of the electronics industry. 2. The physical, chemical, and metallurgical properties of the various Pb-free rep
7、lacement alloys vary significantly. 3. Due to the many sources of solder alloys used in electronic component termination materials or finishes, assembly processes, and repair processes, the potential number of combinations of alloy compositions is nearly unlimited. It is an enormous task to collect
8、data for all these combinations. 4. The test methods developed by other segments (References 1 and 2) are directed toward shorter service lives and more benign environments. Also, there is still a question of suitable dwell times and acceleration factors. (However, the intent of this document is to
9、provide a means of coordinating the information from References 1 and 2 into a basic approach for AHP suppliers.) 5. The data from reliability tests that have been conducted are subject to a variety of interpretations. In view of the above facts, it would be desirable for high-reliability users of P
10、b-free solder alloys to wait until a larger body of data has been collected, and methods for conducting reliability tests and interpreting the results have gained wide acceptance for high-reliability products. In the long run, this will indeed occur. However, the transition to Pb-free solder is well
11、 under way and there is an urgent need for a reliability test method, or set of methods, based on industry consensus. While acknowledging the uncertainties mentioned above, this document provides necessary information for designing and conducting performance tests for aerospace products. In addition
12、, when developing test approaches, the material in question needs to be suitably characterized. Such material properties as ultimate tensile strength, yield strength, Poissons ratio, creep rate, and stress relaxation have been shown to be key attributes in evaluating fatigue characteristics of Pb-fr
13、ee solders. Because of the dynamic nature of the transition to Pb-free electronics, this and other similar documents must be considered provisional. While this document is based on the best information and expertise available, it must be updated as future knowledge and data are obtained. It is publi
14、shed by the Pb-free Electronics in Aerospace Project Working Group, which is sponsored jointly by the Aerospace Industries Association (AIA), the Avionics Maintenance Conference (AMC), and the Government Electronics and Information Technology Association (GEIA). The intent of the document is not to
15、prescribe a certain method, but to aid avionics/defense suppliers in satisfying the reliability and/or performance requirements of GEIA-STD-0005-1 5 as well as support the expectations in GEIA-HB-0005-1 6. Accordingly, it includes 1. a default method for those companies that require a pre-defined ap
16、proach and 2. a protocol for those companies that wish to develop their own test methods. iii Copyright Government Electronics and Products newly-designed with Pb-free solder. For programs that were designed with Tin-Lead solder, and are currently not using any Pb-free solder, the traditional method
17、s may be used. It is important, however, for those programs to have processes in place to maintain the Tin-Lead configuration including those outsourced or manufactured by subcontractors. With respect to products as mentioned above, the methods presented in this document are intended to be applied a
18、t the level of assembly at which soldering occurs, i.e., circuit-card assembly level. 2 References 1. IPC-9701A, “Performance Test Methods and Qualification Requirements for Surface Mount Solder Attachments”, IPC, February 2006. 2. IPC/JEDEC-9703, “Testing Methodologies for Solder Joint Reliability
19、in Shock Conditions”, DATE TBD 3. IPC-SM-785, “Guidelines for Accelerated Reliability Testing of Surface Mount Solder Attachments”, IPC, November 1992. 4. JESD22-B110A, “JEDEC STANDARD Subassembly Mechanical Shock”, November 2004. 5. GEIA-STD-0005-1, Performance Standard for Aerospace and High Perfo
20、rmance Electronic Systems Containing Pb-free Solder. Government Engineering and Information Technology Association, 2006. 6. GEIA-HB-0005-1, Program Management / Systems Engineering Guidelines For Managing The Transition To Pb-free Electronics, 2006 7. GEIA-HB-0005-2, Technical Guidelines for Aerosp
21、ace and High Performance Electronic Systems Containing Pb-free Solder, 2007 8. GEIA-STD-0005-2, Standard for Mitigating the Effects of Tin whiskers in Aerospace and High Performance Electronic Systems. Government Engineering and Information Technology Association, 2006. 9. MIL-STD-810, “DEPARTMENT O
22、F DEFENSE TEST METHOD STANDARD FOR ENVIRONMENTAL ENGINEERING CONSIDERATIONS AND LABORATORY TESTS”, revision F, January 1, 2000. 10. MIL-HDBK-217F, “MILITARY HANDBOOK, RELIABILTY OF ELECTRONIC EQUIPMENT”, 2 December 1991. 11. NASA-DoD LFE Test Protocol, 19 September 2007 2 Copyright Government Electr
23、onics the latter dependency including leaded versus leadless configurations. Additional possible dependencies are discussed below. Presently documented values for c are in Annex B. For many lead-free materials, many parameters have not yet been characterized. Many references are available which disc
24、uss the fatigue ductility exponent. Annex B provides a short subset of such references. Annex B also provides properties (e.g., acceleration test parameters, fatigue ductility coefficients, etc.) for presently known materials but the user should be aware that “c” is not yet known for many Pb-free ma
25、terials. 7 Copyright Government Electronics Temperature cycling is the appropriate stress method; High-temperature and low-temperature dwell times (thd) are critical parameters of the time- temperature cycle 18 Sufficient low temperature limit is -40 oC or -55oC dependent upon contract requirement.
26、User should note that this limit can be different especially for new materials if characterization indicates that stress relaxation changes significantly at a lower temperature. The ramp rate shall be less than 20 oC/minute. A slower ramp rate can be used if characterization data indicates that stre
27、ss relaxation is not affected. User is also directed to IPC-9701A for further implications in using a slower ramp rate. The dwell time thd must exceed the recovery time (tr) for a given alloy, or combination of alloys. Shorter thd may be used if the user provides documentation relative to the effect
28、 of shorter thd on cyclic damage, and hence, on the acceleration factor. NOTE 1: One issue with using -55oC for the low temperature limit is that less creep occurs at low temp, so the assessment of the acceleration factor with most models now in use treats a 15oC delta at low temperature the same as
29、 a 15oC delta at high temperature. The effect is that one could assume a greater acceleration factor for the majority of the application environment (centered at approximately 25oC) than should be taken. On the other hand, colder temperatures can induce greater stress in the solder joint that may in
30、itiate a crack. Current industry experience suggests that the basic guidance used on SnPb solder probably applies here: Accelerate most of the fatigue through temperature ranges most likely to be encountered in use; address the cold temperature limits (below approximately -20oC for SnPb) with additi
31、onal cycles to the cold limit of the application. In some cases, a compromise approach may be taken and -40oC can be selected as the lower temperature limit (even if the -55oC limit applies) for accelerated durability testing. To address ultimate strength issues, typical systems tests (i.e., MIL-STD
32、-810) can be used since contractors and program offices usually prefer a simple test protocol (i.e., one temp cycle profile). 10 Copyright Government Electronics illustrated above are mechanical, and thermal measurements. It is expected that the specific methods and parameters will be selected for e
33、ach given application. 5.2.2 Determine the high-temperature dwell times and temperatures The high temperature dwell times, thd, for all alloys, and combination, for the given high temperature limit of the temperature cycle test shall be determined for each upper temperature limit, on the basis of th
34、e data collected from Section 5.2.1. The specific methods, parameters, and results of these determinations shall be documented for all solder alloys, and combinations thereof. Figure 2 shows a notional method for accomplishing this requirement. The relationship illustrated in Figure 2 should be veri
35、fied for all alloys, and combinations thereof. If it cannot be verified, then the applicable relationship shall be verified and used. Temperature Time to Recovery thdselected from the shaded region trreplotted from Figure 1 Slope = Ea Figure 2 Notional method for determining the relationship between
36、 high temperature dwell time, thd, and recovery time, tr. (This example assumes an idealized system but the slope may differ depending on material, temperature range, and dwell.) 12 Copyright Government Electronics i.e., F50 refers to the point in life where 50% of the individuals in the sample or p
37、opulation have failed. F01 refers to the point where 0.01% of the sample or population has failed, etc. Obviously, with a small sample size like 10, the F01 point for a population cannot be measured directly, since the first failure in this sample size would be at the F10 point, but must be estimate
38、d by statistical analysis. The F63 point (63% of population or sample has failed) is commonly used as a standard metric in wear-out discussions because this point is directly calculated by Weibull distribution estimation software programs as “ETA,“ which is a factor that mathematically determines pr
39、operties of the Weibull distribution function (please refer to statistical texts for further discussion of the Weibull distribution). Also, in this discussion, sample size refers to the number of components, not the number of solder joints. The first failure of any solder joint of a component is def
40、ined as the life of that sample item. The number of solder joints is absolutely not a sample-size definition. N=20 means 20 nominally identical components soldered identically, with identical solder, on identical printed wiring boards (PWBs), e.g., the 20 components could all be on the same PWB, as
41、long as the location (local CTE and side/side warp, for instance) effects are known/incorporated. Sample size of 33 is often used as a default standard but is not an “absolute” requirement. Smaller samples sizes (N=20 and even N=10) can provide useful metrics, to suit the objective, and the resultin
42、g precision can be determined up-front, in test planning. Larger sample sizes, N=50, for instance, will produce more precision in the resultant metrics, especially in early- distribution reliability for products such as heart-implant electronics, and more opportunity for test suspension and/or durin
43、g-test sample withdrawals, without hampering precision significantly. If +/- 5% is needed, use N=50. If +/- 20% is appropriate, use N=10. The expected precision of results based on sample size can be calculated up-front by using appropriate statistical techniques. For the proposed test program, N=20
44、 is recommended as a good balance between precision (typically +/- 15% for estimation of the F63 point), versus the cost due to larger required sample size of the experimental program to obtain higher precision of the statistical estimates.“ If the objective is to compare A versus B, it is recommend
45、ed that a central metric (i.e., central to the failure distribution of the population between no failures and 100% failures) be used, such as the F63 or F50 failure percentage points. If the objective is to estimate early failure points in the life distribution, such as the F.01 or F.001 points, use
46、 a larger sample size. It is desirable to allow the test to run until all samples fail. This provides higher confidence levels and precision of the statistical estimates. But suspension (i.e., terminating the test) when 60% of the parts have failed , to approximately cut the test time in half, will
47、yield metrics with reasonable confidence levels within 5-10%. If the objective is specification compliance data (i.e., greater than a pre-determined number), recognize that sample-size is critical: the greater the sample-size, the more likely to encounter failing samples. Again, that can be estimate
48、d up-front. For any set of failure data, commonly available Weibull estimating software programs can 19 Copyright Government Electronics 21:345 354, published online 10 March 2005 in Wiley InterScience (). DOI: 10.1002/qre.667 Osterman, M. et. al., “Effect of Temperature Cycle on the Durability Pb-f
49、ree Interconnects (Sn96.5Ag3.0Cu0.5 and SN100C)”, Report of Project C06-06, CALCE EPSC Fall 2006 Technical Review, University of Maryland Center for Advanced Life-Cycle Engineering, October 17, 2006. 23 Copyright Government Electronics & Information Technology Association Provided by IHS under license with GEIA Licensee=Boeing Co/5910770001 Not for Resale, 07/25/2008 03:24:41 MDTNo reproduction or networking permitted without license from IHS -,-,- GEIA-STD-0005-3 Annex C. NASA-DoD