清华大学电机系微电子试验室创於1992年至今历时七年在此七年草创.doc

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1、實驗室簡介-清華大學微電子實驗室I. 簡介清華大學電子所微電子實驗室創於 1992 年，至今歷時七年，在此七年草創 時期，本實驗室在國科會、產業界及電機系之支持下，已建立了豐富的半導體元 件設計、製作與測試能力。提供有志於半導體元件研究之同學相當充實之環境， 使同學能獲得激勵，在其研究所之生涯中，得有新的創見，完成高品質之研究， 以期對社會有所貢獻，並獲得個人之成就感。II. 研究團隊指導教授 徐清祥老師 研究工作(1) Flash Memory 相關研究贊助單位：國科會，華邦電子，美國 PMC國家毫微米實驗室博士生：楊青松，王彥森，周秀芬 碩士生：翁偉哲，姚裕源快閃式記憶體是利用將電子注入或

2、拉出浮動閘(floating gate)以進行資料儲存的非揮發性(non-volatile)半導體記憶元件，目前廣泛地被應用在個人電腦、行 動電話、數位相機等相關產品上。本研究小組對各種結構之快閃式記憶體，如堆疊閘式(stacked-gate或分離閘式(split-gate)，均有深入之研究。除在國際各學術研討會 (如IEDM, VLSI, SSDM, NVSMW 等)與知名期刊 (如 ED, EDL, JJAP 等)常有作品發表外 ，更擁有國內外多 項專利權。除了提出新的操作機制，本研究小組也奮力研發新型結構的快閃式記 憶體，目前也有了多項突破性的成果。此外，因應記憶體需求的日益成長，本研

3、究小組也提出了各種多重邏輯(multi-level)操作方式以實現高密度快閃式記憶體 的目標。至於目前備受矚目的低壓低功率 P型通道快閃式記憶體，則是在1992年由 徐清祥老師等人首先提出，之後本研究小組不間斷地在此領域進行更深入的探 討，相關成果已在多個國際學術研討會上發表。除了元件結構與特性之外 ，對快閃式記憶體效能有直接影響的介電層材料與 可靠度分析都是本小組研究的重點項目 ，實驗室內眾多精良的量測設備對於高品質的研究成果則是功不可沒。(2) EEPRO相關研究 贊助單位：立生半導體 博士生：林瑞霖 碩士生：柏正豪，林詩芸，李茂麟EEPRO是電性可擦拭可程式化唯讀記憶體的簡稱，在非揮發性

4、記憶體的市場上，占有很重要的地位。基本上我們研究的方向可分為：(1)、EERPOI特性的改善，(2)、EEPRO可靠度分析，(3)EEPROK元件的縮小化，(4)EEPROM陣列 操作方法的改進。在過去一年多的計劃執行期間，EEPRO小組不但建立了一套關於EEPRO的特型及可靠度分析的量測模組，並提出數種擬動態快速編碼的方 法，以加快EEPRO的寫入速度，除此之外，還提出源極端自我收斂特性的操作 模式以達到Multi-Level的效果。目前EEPRO小組仍針對前述的研究方向繼續 提出新的構想，以期能使 EEPRO做更廣泛的應用。(3) Oxide Reliability 相關研究贊助單位：台灣

5、積體電路公司，茂矽電子 博士生：李海明 碩士生：劉承傑，許志維自1961年金氧半場效電晶體(MOSFET問世以來，半導體製程技術不斷提 升。根據摩爾定律(Moore's Law)，金氧半場效電晶體的通道長度每三年會縮 小 0。 7 倍。為了要確保閘極對通道仍然有良好的控制能力，元件中的氧化層必 須變薄。薄氧化層帶來了優點，如導通電流增加、短通道效應( Short Channel Effect )的抑止、等；但也引發出不少問題。最近的研究顯示，當氧化層厚度小 於3nm元件的操件會由漏電流所限制。因此深入了解具有超薄氧化層金氧半場 效電晶體之閘極漏電流機制是迫切且必要的 。本小組在超薄氧化

6、層元件之閘極漏 電流的研究已經有了一些成果，未來將藉由更多的資料建立一個更有效的模型， 以對閘極漏電流機制有更精準的描述。(4) Power IC 相關研究贊助單位：國科會，茂達電子，漢磊科技 博士生：廖崇維 碩士生：田浩倫，林偉捷鑑於功率半導體在台灣未來的發展與需求 ，所以此領域一直是微電子實驗室 成立後所發展的重要方向之一。主要功率半導體元件有功率金氧半場效電晶體（Power MOS、功率雙載子電晶體（Power BJT）、閘流體（Thyristors ）及絕 緣閘雙載子電晶體（IGBT）等。這些功率半導體元件最大的特色就是能耐高電 壓（可達4500伏特），再利用其佈局的面積便可使其耐高電

7、流（市面上產品大 都可達20安培-60安培）。自從成立功率小組後，經過歷屆學長不斷的研究開 發，及科學園區廠商的協助與合作，在這幾年已有不錯的成果。所發展的元件都 以國外著名大廠（如IR、IXYS、SIMEN$的產品規格為目標。未來的目標除了 繼續改良既有的元件特性（包括動態及靜態）夕卜，將更致力於開發新一代的功率 半導體元件的開發。（5）CMOS Imager Sen sor 相關研究贊助單位：工研院電子所，台灣積體電路公司碩士生：鐘承霖，謝博堯互補式金氧半影像感測元件（CMOS image sensor）是目前固態影像感測元 件中剛剛興起的一種技術。我們可利用其低消耗功率、低製造成本、成熟

8、的製程 技術、及能與其他週邊電路整合在同一晶片（Chip ）上，達到所謂的System-On Chip，使得這種元件能夠在市場上立足。此元件也會慢慢取代製程技術複雜、消 耗功率高、且需要許多組高操作電壓的電荷耦合元件（Charge Coupled Device， 簡稱CCD影像感測器。以後這種互補式金氧半影像感測元件可大量應用在數位 相機、閉路監視系統、影像電話、指紋辨識系統、及手提式攝影機中，所以這是 個非常重要的元件，也是個相當值得研究的題目。本組以國科會晶片製作中心（CIC）之 TSMC 0.6un的互補式金氧半導體製程（Complementary Metal Oxide Semicon

9、ductor，簡稱CMOS為技術基底，不更動任何光罩，設計出具有高飽和 準位，低暗電流，高靈敏度等特性之互補式金氧半影像感測元件，使得影像更加 清晰，達到我們所要求的程度。往後將對此再做個進一步的研究，以期有更多的 成果。III. 儀器設備A.通用I-V測試站名稱規格數量Semic on ductor Parameter An alyzerHP 4145B1Precisio n Semic on ductor parameter an alyzeHP 4056A1Module DC Source/Mo nitorHP 4142A1Source/Mo nitor Un itHP 41421B25

10、0MHz Dual Cha nnel Pulse Gen eratorHP 8115A1150MHz Dual Cha nnel Pulse Gen eratorHP 8110A1100V/2A Pulse Gen eratorHP8114A1Digitiz ing OscilloscopeHP 54504A120Hz1MHz Precision LCR MeterHP 4284A1PA Meter/DC SourceHP 4140B1SMU and Pulse Gen erator Expa nderHP41501A1B.高功率元件測試站名稱規格數量High Curre nt Source/

11、Mo nitor Un itHP 41422A1High Boltage Source/Mo nitor UnitHP 41423A1Power Gen eratorGPR-3010HD1100V/2A Pulse Gen eratorHP8114A1150MHz Dual Cha nnel Pulse Ge neratorHP 8110A1Semic on ductor Parameter An alyzerHP4145B1Digitiz ing OscilloscopeHP 54504A1C.快閃記憶體測試站名稱規格數量50MHz Dual Cha nnel Pulse Ge nerato

12、rHP 8115A1150MHz Dual Cha nnel Pulse Ge neratorHP 8110A1Digitiz ing OscilloscopeHP 54504A1Module DC Source/Mo nitorHP 4142A1Source/Mo nitor UnitHP 41421B2Switch/Control UnitHP 3488A2Switch MatrixHP 44473A2D.光感測元件測試站名稱規格數量50MHz Dual Cha nnel Pulse Ge neratorHP 8115A1Digitiz ing OscilloscopeHP 54504A1

13、Switch/Control UnitHP 3488A2Precisio n Semic on ductor parameter an alyzer HP 4056A1100V/2A Pulse Gen eratorHP8114A1Autora nging PicoammeterKEITHLEY 4851SMU and Pulse Gen erator Expa nderHP41501A1Power Gen eratorGPR-3010HD1IV. 成果本實驗室在VLSI的領域內已有許多研究成果發表，論文加上專利已達一百 多篇，並且在半導體領域中極難投上的IEDM有兩篇發表，另外在VLSI上今

14、年 也已經有一篇被接受，即將要發表出來。這兩個會議上的文章都是當前對半導體 技術有最新發現以及有重要影響才能被接受。以下列出本實驗室的研究成果僅供 參考：A.碩，博士論文項目年代學位姓名題目11998博士沈士傑快閃式記憶體元件之可靠性研究21998博士孫文堂第五族元素在深次微米P型電晶體閘 極工程上之應用”博士論文31998碩士廖崇維互補式金氧半電晶體技術中垂直式功 率金氧半元件之設計與研究41998碩士王彥森通道熱電洞引發熱電子寫入 P型快閃 式記憶體之設計與分析51998碩士張湘忠互補式金氧半電晶體技術中之咼壓 P 型通道電晶體之設計與研究61997博士林崇榮過矽氧化層的快閃記憶體之強化穿

15、遂 特性及其模型71997碩士林瑞霖二元/多值邏輯快閃記憶體操作模式 之設計與分析81997碩士郭東政深次微米金氧半導體電晶體之大角度 離子佈值源/汲極之設計91997碩士李皞明寫入/擦拭之循環操作對快閃式記憶 體電荷流失之影響101997碩士沈子賓高功率絕緣閘極性電晶體之製造與量 測分析111996碩士林獻欽基體接觸對部分空乏SOI元件之特性 影響研究121996碩士朱豫平絕緣閘雙極性功率電晶體之不同結構對閂瑣特性的影響131996碩士陳信銘大角度P型雜質包覆佈值對快閃可擦 拭、可程式唯讀記憶體之效應141995碩士廖緯武砷共植入於鈷矽化之P型複晶矽閘中 對P型閘特性之影響151995碩士張

16、家榮絕緣閘雙極性功率電晶體閂瑣特性之 研究161995碩士李明家閘極長度對垂直式雙擴散功率金氧半 電晶體之效應研究171995碩士林明德高壓積體式金氧半電晶體之耐壓特性 設計與研究181995碩士楊青松五價元素在複晶矽中對硼在薄氧化層 穿透效應之研究191994碩士蔡世偉利用埋臧式注入結構之熱載子注入法 研究攙氮之超薄氧化層及介面陷阱之 產生機構201994碩士陳遂泓複晶矽中磷或對硼在超薄氧化層中穿 透效應之研究B.期刊及會議論文(i )期刊論文1. W. H. Cha ng, B. Davari, M. R. Wordema n, Y. Taur, C. C.-H. Hsu, and M.

17、D. Rodriguez, "A High Performanee 0.25 Micron CMOS Technology, Part I-Design and Charaeterization", IEEE Transaetions on Electron Devices, Vol. 39, No. 4, p. 959, April 1992.2. Davari, W. H. Cha ng, K. Petrillo, C. Wong, D. Moy, Y. Taur, M. Wordema n, J. Sun, C. C.-H. Hsu, "A High Per

18、forma nee 0.25 Micro n CMOS Tech no logy, Part II-Tech no logy", IEEE Tran sactio ns on Electro n Devices, Vol. 39, No. 4, p. 967, April 1992.3. A. Acovic, C. C.-H. Hsu, L.-C. Hsia, A. Balas in ski, and T. P. Ma, "Effects of X-ray Irradiatio n on GIDL in MOSFET's", IEEE Electro n

19、Device Lett. Vol 13, No.4. p. 189, April 1992.4. Y. Taur, D. Zicherman, D. Lombardi, P. Restle, C. C.-H. Hsu, H. Hanafi, M. Wordeman, B. Davari, and G. Shahidi, "A New "Shift and Ratio" Method for MOSFET Cha nn el-Le ngth Extractio n", IEEE Electro n Device Lett., Vol. 13, No. 5,

20、 p. 267, May 1992.5. C. C.-H. Hsu, L. K. Wang, D.Zicherman, and A. Acovic, "Effect of Hydrogen Annealing on Hot-Carrier Instability of X-ray Irradiated CMOS Devices," J. Electronic Material, July 1992.6. L. Dori, A. Acovic, D. DiMaria, C. C.-Hsu, "Optimized Silicon-Rich Oxide (SRO) De

21、position Process for 5V Only Flash EEPROM Applications," IEEE Electron Dev. Lett. June, 1993.7. Y. Taur, S. Cohen, S. Wind, T. Lii, C. C.-H. Hsu, D. Quinlan, C. Chang, D. Buchanan, P. Agnello, Y. Mii, C. Reeves, A. Acovic, and V. Kesan, "Experimental 0.1-um p-Chanel MOSFET with p+ Polysili

22、con Gate on 35A Gate Oxide," IEEE Electron Dev. Lett., Vol. 14, No. 6, June 1993.8. Y. Taur, C. C.-H. Hsu, B. Wu, R. Kiehl, B. Davari, and G. Shahidi, "Saturation Transconductance of Deep-Submicron-Channel MOSFETs,"Solid-State Electronics, Vol. 36, NO. 8, Aug. 1993.9. A. Acovic, C. C.

23、-Hsu, and L. C. Hsia, "Reduced Hot-Carrier Reliability Degradation of X-ray Irradiated MOSFETs in a 0.25um CMOS Technology with Ultra-Thin Gate Oxide," Solid State Electronics, Vol. 36, No. 9, Spet. 1993.10. J.-C. Guo, C. C.-H. Hsu, and S. S.-S. Chung, "Direct Observation of Channel-D

24、oping Dependent Reverse Short Channel Effect Using Decoupled C-V Technique," Jpn. J. Appl. Phys. Vol. 33, Jan.,1994.11. J.-C. Guo, C. C.-H. Hsu, M.-C. Chang, and C. Y. Lu, "Performance and Reliability Evaluation of High Dielectric LDD Spacer on Deep Sub-Micrometer LDD MOSFET's," I

25、EEE Trans, on Electron Dev. Vol. 41, No. 7, July 1994.12. C. C.-H. Hsu, D. S. Wen, M. R. Wordeman, Y. Taur, T. Ning, "A Comprehensive Study of Hot-Carrier Instability in P-and N-type Poly-Si Gated MOSFETs," IEEE Transaction on Electron Device, IEEE Trans. on Electron Dev., Vol. 41, No. 5,

26、May 1994.13. J.-C. Guo, S. S.-S. Chung, and C. C.-H. Hsu, "A New Approach to Determine the Effective Channel Length and the Drain-and Source Series Resistance of Miniaturized MOSFET's," IEEE Trans. On Electron Device Vol. 41, No. 10, Oct. 1994.14. Wein-Town Sun, Ching-Song Yang, Ming-C

27、hi Liaw, and Charles Ching-Hsiang Hsu, “ Antimony -CImo plantation to Suppress Boron-Penetration in P+-Poly Gate Metal-Oxide-Semiconductor Transistors, Jpn”. J. Appl. Phys., Vol. 35, pp.L377-L379, 1996.15. Ching-Song Yang, Chrong-Jung Lin, Ping-Yu Kuei, Sheng-Fu Horng, Ming-Chi Liaw and Charles Chin

28、g-Hsiang Hsu, “ Quantumsize effects on photoluminescence from Si nanocrystals in PECVD Silicon-Rich- Oxide, ” Applied Surface Science, 113/114, pp.116-120,199716. Wein-Town Sun, Ming-Chi Liaw, Kuang-Chien Hsieh, Member, IEEE, and Charles Ching-Hsiang Hsu, “ Impact of Nitrogen (N2+) Implantation into

29、 Polysilicon Gate on Thermal Stability of Cobalt Silicide Formed on Polysilicon Gate” , IEEE Tractions on Electron Devices, Vol.45, No9, September 1998.17. Evans Ching-Song Yang, Wei-Jer Wong, Rich Shih-Jye Shen, Yen-Sen Wang, and Charles Ching-Hsiang Hsu, “New S-Celof nvergent Programming Method fo

30、r Multi- Level AND Flash Memory,”Jpn. J. Appl. Phys, Vol. 38, Pt. 2, No. 4B, pp.47-51, 1997.18. Shih-Jye Shen, Hsin-Ming Chen, Chrong-Jung Lin, Hwi-Huang Chen, Gary Hong and Charles Ching- Hsiang Hsu, “ Performanceand Reliability Trade-off of Large-Tilted-Angle Implant P-Pocket on Stacked-Gate Memor

31、y Devices ”J,pn. J. Appl. Phys, Vol.37, No. 7, 1997.19. Shih-Jye Shen, Ching-Song Yang, Wei-Jer Wong, Yen-Sen Wang, Chrong-Jung Lin, Mong-Song Liang and Charles Ching-Hsiang Hsu, “ Degradation of Flash Memory Using Drain Avalanche Hot Electron (DAHE) Self-Convergence Operation Scheme, ” Jpn. J. Appl

32、. Phys., Vol. 37, pp.-LL777880, 1998.( ii ) 會議論文1. C. C.-H. Hsu, B. S. Wu, G. G. Shahidi, B. Davari, W. H. Chang, and A. Acovic, "Understanding of Enhanced Sensitivity to Hot Carrier Degradation in Drain Engineered n-FETs," 1992 International Conference on Solid State Devices and Materials

33、, Japan Society of Aplied Physics, p. 512, Tsukuba, Japan, Aug. 1992.2. C. C.-H. Hsu, A. Acovic, L. Dori, B. Wu, T. Lii, D. Quinlan, d. DiMaria, Y. Taur, M. Wordeman, and T. Ning, "A High Speed, Low Power P-Channel Flash EEPROM Using Silicon Rich Oxide as Tunneling Dielectric," 1992 Intern

34、ational Conference on Solid State Devices and Materials, Japan Society of Applied Physics, p. 512, Tsukuba, Japan, Aug. 1992.3. C. C.-H. Hsu, "Reliability of Synchrotron X-ray Irradiated Submicron Devices," Third International Conference on Sold State and IC Technology, p. 641, China, Oct.

35、, 1992.4. (invited)C. C.-H. Hsu and H. L. Hwang, "Thin Oxide Reliability Physics," Third International Conference on Solid State and IC Technology, p. 604, China, Oct., 1992.5. C. C.-H. Hsu, A. Acovic, L. Dori, B. Wu, and T. Lii, "A 5V Only high Speed, Low Power P-Channel Flash EEPROM

36、," International Electron Devices Materials Symposium, Taipei, Nov. 1992.6. Y. Taur, S. Cohen, S. Wind, T. Lii, C. C.-H. Hsu, D. Quinlan, C. Chang, D.Buchanan, P. Agnello, Y. Mii, C. Reeves, A. Acovic, and V. Kesan, "High Transconductance 0.1um PMOSFET," p. 901, Proceeding of the 1992

37、 IEDM (International Electron Device Meeting)7. J. C. Guo, P. S. Lin, and C. C.-H. Hsu, "The Side Effects of Sidewall Polyoxide and Spacer Bottom Oxide on the Submicron High Dielectric Spacer LDD MOSFET's," p. 33,1993 Symposium on Semiconductor Modeling & Simulation., Taipei, Mar.

38、1993.8. J. C. Guo, C. C.-H. Hsu, P. S. Lin, and S. S. Chung, "An Accurate "Decoupled C-V" Method for Characterizing Channel and Overlap Capacitances of Miniaturized MOSFET", International Symposium on VLSI Technology. Systems, and Applications Taipei, p. 256, 1993.9. C. C.-H. Hsu

39、, J. C. Guo, and M. H. Kuo, "Direct Observation of Channel-Doping-Dependent Reverse Short Channel Effect Using Decoupled C-V Technique," accepted by 1993 International Confercence Solid State Devices and Materials, Japan.10. C. C.-H. Hsu, and C. J. Lin, "Mobility Degradation Induced b

40、y Substrate-Hot-Electron Generated Interface Traps at Different Stress Voltages and Temperatures, "Accepted by 1993 International Conference Solid State Devices and Materials, Japan.11 Shih-Jier Shen, Chih-Shih Wei, and Charles Ching-Hsiang Hsu, “ANew Observation on Initial Charge Loss in EPROM

41、nat”ion, aInl tSerymposium on VLSITechnology, Systems, and Applications, 1995.12. Hsing-Ming Chen, Chrong-Jung Lin, Shih-Jye Shen, Chen-Ming Yih, Steve S. Chung and Charles Ching-Hsiang Hsu, “ Optimization of Large-Tilted-Angle Implanted P-Pocket (LAP) for High Performance and Reliable Flash EPRO”M

42、, IEDMS'9613. Ching-Song Yang, Chrong-Jung Lin, Ming-Chi Liaw, and Charles Ching-Hsiang Hsu, “ Light Emission from Quantum Size Effect of Nanocrystlline Silicon in PECVD Silicon-Rich- Oxide, ” Eighth International Conferecne on Solid Films and Surfaces (ICSFS-8), July 1996.14. Wein-Town Sun, Chi

43、ng-Song Yang, Wei-Wu Liaw, Ming-Chu Liaw, and Charles Ching-Hsiang Hsu, ” Bo-roPnenetration and Silicide Diffusion Retarded by Arsenic Co-Implant in P+-Poly Gate of Sub-0.25mm PMOSFETs, ”Proc. Of International Electron Device and Material Symposia (IEDMS), pp.43-46, 1996.15. Shih-Jye Shen, Chrong-Ju

44、ng Lin, and Charles Ching-Hsiang Hsu, “ Ultra Fast Write Speed, Long Refresh Time, Low Power F-N Operated Volatile Memory Cell with Stacked Nanocrystalline Si Film”, IEDM Tech. Dig,-p5p1.85,115996.16. Shih-Jye Shen, Ching-Song Yang, Yen-Sen Wang, and Charles Ching-HsiangHsu, “ NovelSelf-Convergent P

45、rogramming Scheme for Multi-level P-Channel Flash Memory, ” IEDM Tech. Dig., pp.2-82790, 1997.17. Yen-Sen Wang, Shih-Jye Shen, Ching-Song Yang, and Charles Ching-Hsiang Hsu, “New Programming Scheme for P-Channel Flash Memory,” IEEE Non-Volatile Semiconductor Memory Workshop98'-9, 1p,pA.8u8g. 199

46、8.18. Evans Ching-Song Yang, Wei-Jer Wong, Rick Shih-Jye Shen, Yen-Sen Wang, and Charles Ching-Hsiang Hsu, “New S-Celof nvergent Programming Method for Multi- Level AND Flash Memory,” Proc. Of International Conference on Solid State Devices and Materials (SSDM98'), Sep. 1998.19. Chih-Wei Hsu, Sh

47、eng-Chang Wang, Zih-Ming Chau, San-Jung Chang, Ching-Song Yang, and Charles Ching-Hsiang Hsu, “An insight of the Correlation Between Constant Current, Ramp Current, and Ramp Voltage Stresseson MOS Reliability, Pr”oc. Of International Electron Device and Material Symposia (IEDMS), 1998.20. Hi-Ming Le

48、e, Yen-Sen Wang, Shih-Jye Shen, Ching-Song Yang, and Charles Ching-Hsiang Hsu, “ Constant Current Programming Scheme fo-Cr Phannel Flash Memory,” Proc. Of International Electron Device and Material Symposia (IEDMS), 1998.21. (invited)Ruei-Ling Lin, Yen-Sen Wang, and Charles Ching-Hsiang Hsu, “P-Channel Flash Memory” , IEEE Non-Volatile Semiconductor Memory Workshop98', 1998.22. Evans Ching-Song Yang, Cheng-Jye Liu, Tien-Sheng Chao, Ming-Chi Liaw, and Charles Ching-Hsiang Hsu, “ NovelBi -directional Tunneling Program/Erase NOR (BiNO