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1、INCITS TR-29-2002 Information Technology SCSI Signal Modeling (SSM) Copyright American National Standards Institute Provided by IHS under license with ANSI Licensee=IHS Employees/1111111001, User=OConnor, Maurice Not for Resale, 04/29/2007 13:51:29 MDTNo reproduction or networking permitted without
2、license from IHS -,-,- INCITS TR-29-2002 INCITS Technical Report Information Technology SCSI Signal Modeling (SSM) Secretariat Information Technology Industry Council Abstract This technical report is intended to establish a common methodology so that SCSI systems may be modeled and simulated accura
3、tely and consistently. It establishes the requirements for the exchange of performance information between components suppliers and system simulators. It defines the acceptable methods for extracting the electrical and performance attributes of the constituent parts of the SCSI parallel interface. I
4、t establishes a common methodology for simulating the SCSI physical environment. It is intended to be used in conjunction with the requirements within the T10 SCSI Parallel Interface (SPI-x) family of standards. Copyright American National Standards Institute Provided by IHS under license with ANSI
5、Licensee=IHS Employees/1111111001, User=OConnor, Maurice Not for Resale, 04/29/2007 13:51:29 MDTNo reproduction or networking permitted without license from IHS -,-,- This Technical Report is one in a series produced by the InterNational Committee for Information Technology Standards (INCITS). The s
6、ecretariat for INCITS is held by the Information Technology Industry Council (ITI), 1250 Eye Street, NW, Suite 200, Washington, DC 20005. As a by-product of the standards development process and the resources of knowledge devoted to it, INCITS from time to time produces Technical Reports. Such Techn
7、ical Reports are not standards, nor are they intended to be used as such. INCITS Technical Reports are produced in some cases to disseminate the technical and logical concepts reflected in standards already published or under development. In other cases, they derive from studies in areas where it is
8、 found premature to develop a standard due to a still changing technology, or inappropriate to develop a rigorous standard due to the existence of a number of viable options, the choice of which depends on the users particular requirements. These Technical Reports, thus, provide guidelines, the use
9、of which can result in greater consistency and coherence of information processing systems. When the draft Technical Report is completed, the Technical Committee approval process is the same as for a draft standard. Processing by INCITS is also similar to that for a draft standard. CAUTION: The deve
10、lopers of this technical report have requested that holders of patents that may be required for the implementation of the technical report, disclose such patents to the publisher. However, neither the developers nor the publisher have undertaken a patent search in order to identify which, if any, pa
11、tents may apply to this technical report. As of the date of publication of this technical report, following calls for the identification of patents that may be required for the implementation of the technical report, notice of one or more claims has been received. By publication of this technical re
12、port, no position is taken with respect to the validity of this claim or of any rights in connection therewith. The known patent holder(s) has (have), however, filed a statement of willingness to grant a license under these rights on reasonable and nondiscriminatory terms and conditions to applicant
13、s desiring to obtain such a license. Details may be obtained from the publisher. No further patent search is conducted by the developer or the publisher in respect to any technical report it processes. No representation is made or implied that licenses are not required to avoid infringement in the u
14、se of this technical report. INCITS Technical Report Series Published by American National Standards Institute 25 West 43rd Street, New York, New York 10036 Copyright 2002 by Information Technology Industry Council (ITI) All rights reserved No part of this publication may be reproduced in any form,
15、in an electronic retrieval system or otherwise, without prior written permission of the publisher. Printed in the United States of America PATENT STATEMENT Copyright American National Standards Institute Provided by IHS under license with ANSI Licensee=IHS Employees/1111111001, User=OConnor, Maurice
16、 Not for Resale, 04/29/2007 13:51:29 MDTNo reproduction or networking permitted without license from IHS -,-,- i Contents 1 Scope .1 2 References .2 2.1 Overview .2 2.2 Approved references .2 2.3 References under development 2 3 Resources 3 3.1 Publications .3 3.2 Tools .4 3.2.1 Simulation tools 4 3
17、.2.2 Extraction tools .4 3.2.3 Model creation tools .4 4 Definitions, acronyms, symbols, abbreviations, keywords, and conventions .4 4.1 Definitions .4 4.2 Acronyms 11 4.3 Symbols and abbreviations .11 4.4 Keywords 13 4.5 Conventions 13 5 General .14 5.1 Overview .14 5.2 Signal modeling purposes .15
18、 5.2.1 Overview 15 5.2.2 Physical components and signals 15 5.2.2.1 Relationship between physical and modeling terminology 15 5.2.2.2 Elemental components 15 5.2.2.3 Composite components 16 5.2.2.4 Systems 16 5.2.2.5 Signals and measurement points 16 5.2.2.6 Run length dependent driver signals .17 5
19、.2.2.7 Interactions between signals on different signal lines .17 5.2.3 Viewpoints .18 5.3 Application to measurement 19 5.4 Practical considerations for creating models .20 5.5 Relationship between components of the modeling environment .21 5.6 Relationship between signal specifications in standard
20、s and modeling 22 5.7 Accuracy and model validation considerations .22 6 Methodologies 23 6.1 Overview .23 6.2 Behavioral .23 6.2.1 IBIS 23 6.2.1.1 Overview .23 6.2.1.2 IBIS model creation .24 6.2.1.3 Pre-modeling activities 24 6.2.1.3.1 IBIS version 24 6.2.1.3.2 Specific device .25 6.2.1.3.3 Corner
21、 limits .25 6.2.1.3.4 SSO effects 25 6.2.1.3.5 Schematics .25 6.2.1.3.6 Clamp diode and pullup references .25 6.2.1.3.7 Packaging information 25 6.2.1.3.8 Signal selection 26 6.2.1.3.9 Die capacitance 26 6.2.1.3.10 Vinl and Vinh parameters .26 6.2.1.3.11 Tco measurement conditions .26 Copyright Amer
22、ican National Standards Institute Provided by IHS under license with ANSI Licensee=IHS Employees/1111111001, User=OConnor, Maurice Not for Resale, 04/29/2007 13:51:29 MDTNo reproduction or networking permitted without license from IHS -,-,- ii 6.2.1.3.12 Buffer grouping .26 6.2.1.4 Data extraction 2
23、6 6.2.1.4.1 s2ibis extraction .26 6.2.1.4.2 Direct simulation extraction 26 6.2.1.4.2.1 Extracting I/V data .27 6.2.1.4.2.2 Hi-Z buffers .27 6.2.1.4.2.3 Output only buffer 28 6.2.1.4.2.4 Open drain buffers 28 6.2.1.4.2.5 Input buffers 28 6.2.1.4.2.6 Sweep ranges .28 6.2.1.4.2.7 Pullup and power clam
24、p sweeps relative to Vdd .29 6.2.1.4.2.8 Diode models 29 6.2.1.4.2.9 Extracting the Ramp Rate or V/s Waveform Data .29 6.2.1.4.2.10 Extracting Data for the Ramp Keyword .30 6.2.1.4.2.11 Extracting Data for the Rising and Falling Waveform Keywords .30 6.2.1.4.2.12 Minimum Time Step 31 6.2.1.4.2.13 Fa
25、llback drivers .32 6.2.1.5 Creating the IBIS file .32 6.2.1.5.1 Overview 32 6.2.1.5.2 Header Information 32 6.2.1.5.3 Component and pin information .33 6.2.1.5.4 Model description 34 6.2.1.5.4.1 Model keyword parameters .34 6.2.1.5.4.2 Temperature Range and Voltage Range keywords 35 6.2.1.5.4.3 I/V
26、data section 35 6.2.1.5.4.4 Pulldown keyword .36 6.2.1.5.4.5 GND Clamp keyword 36 6.2.1.5.4.6 Pullup keyword 36 6.2.1.5.4.7 POWER Clamp keyword .37 6.2.1.5.4.8 Clamp keyword extrapolation caveats 37 6.2.1.5.4.9 Ramp keyword and waveform tables 37 6.2.1.5.4.10 Driver Schedule keyword 38 6.2.1.5.5 Ext
27、ernal Package Models 39 6.2.1.5.6 IBIS file conformance .39 6.2.1.6 IBIS model validation 40 6.2.1.7 IBIS model verification 40 6.2.1.8 Acceptance criteria 41 6.2.2 Maxwell matrices 41 6.2.2.1 Overview .41 6.2.2.2 Empirical extraction .41 6.2.3 Theoretical extraction .43 6.2.4 Interpreting Maxwell m
28、atrices 44 6.3 Circuit models .45 7 Models 46 7.1 Overview .46 7.2 General requirements .46 7.2.1 Applicability 46 7.2.2 Documentation .46 7.2.3 Model Name .47 7.2.4 Model class 47 7.2.5 Model boundary .47 7.2.6 Model limitations or dependencies .47 7.2.7 Model creation methodology 47 7.2.7.1 Model
29、creation stimuli .48 7.2.7.2 Amplitude and timing .48 7.2.7.3 Frequency range .48 Copyright American National Standards Institute Provided by IHS under license with ANSI Licensee=IHS Employees/1111111001, User=OConnor, Maurice Not for Resale, 04/29/2007 13:51:29 MDTNo reproduction or networking perm
30、itted without license from IHS -,-,- iii 7.2.7.4 Rise time .48 7.2.8 Model validation .48 7.2.8.1 Accuracy requirements .48 7.2.8.2 Model validation stimuli .49 7.2.8.3 Amplitude and timing .49 7.2.8.4 Frequency range .49 7.2.8.5 Rise time .50 7.2.9 Model support contact information .50 7.2.10 Licen
31、se agreement .50 7.3 Interconnect component models .50 7.3.1 Overview 50 7.3.2 Cables 50 7.3.2.1 Description 50 7.3.2.2 Model boundary 50 7.3.2.3 Model class .51 7.3.2.4 Methodology 51 7.3.2.5 Correlation accuracy .51 7.3.3 Transition region 51 7.3.3.1 Description 51 7.3.3.2 Model boundary 51 7.3.3.
32、3 Model class .51 7.3.3.4 Methodology 52 7.3.3.5 Validation 52 7.3.3.5.1 Ribbon or twisted flat cable to IDC connectors 52 7.3.3.5.2 Round cable to connector 52 7.3.3.5.3 Printed circuit board to connector 52 7.3.3.6 Correlation accuracy .52 7.3.4 Connectors .52 7.3.4.1 Description 52 7.3.4.2 Model
33、boundary 52 7.3.4.3 Model class .52 7.3.4.4 Methodology 53 7.3.4.5 Validation 53 7.3.4.6 Correlation accuracy .53 7.3.5 Printed circuit boards .53 7.3.5.1 Model boundary 53 7.3.5.2 Model class .53 7.3.5.3 Methodology 53 7.3.5.4 Validation 54 7.3.5.5 Correlation accuracy .54 7.4 Devices .54 7.4.1 Ove
34、rview 54 7.4.2 Transceivers .54 7.4.2.1 Model boundary 54 7.4.2.2 Model class .54 7.4.2.3 Methodology 54 7.4.2.4 Validation 54 7.4.2.4.1 Correlation accuracy 54 7.4.3 Terminators 55 7.4.3.1 Description 55 7.4.3.2 Model boundary 55 7.4.3.3 Model class .55 7.4.3.4 Description 55 7.4.3.4.1 Single-ended
35、 terminator .55 7.4.3.4.2 Low-voltage differential terminator .56 7.4.3.4.2.1 Y terminator .56 7.4.3.4.2.2 Resistor stack terminator 58 Copyright American National Standards Institute Provided by IHS under license with ANSI Licensee=IHS Employees/1111111001, User=OConnor, Maurice Not for Resale, 04/
36、29/2007 13:51:29 MDTNo reproduction or networking permitted without license from IHS -,-,- iv 7.4.3.4.3 Multi-mode terminator 59 7.4.4 Methodology .59 7.4.5 Validation .59 7.4.5.0.1 Correlation accuracy 59 7.5 Instrumentation models .60 7.5.1 Description .60 7.5.2 Model boundary .60 7.5.3 Model Clas
37、s .60 7.5.4 Probe models .60 7.5.5 Methodology .61 7.5.6 Correlation accuracy 61 8 Standard model constructions 61 8.1 Host bus adapter / target board 61 8.1.1 Description .61 8.1.2 Model boundary .61 8.1.3 Model class 61 8.1.3.1 Methodology 61 8.2 Cable assemblies 62 8.2.1 Description .62 8.2.2 Mod
38、el boundary .62 8.2.3 Model class 62 8.2.4 Methodology .62 8.3 Backplane .62 8.3.1 Description .62 8.3.2 Model boundary .63 8.3.3 Model class 63 8.3.4 Methodology .63 8.4 System models 63 9 Measurement and validation 63 9.1 Measurement points 64 9.1.1 Physical measurement points 64 9.1.1.1 Transceiv
39、er .64 9.1.1.2 Terminator .64 9.1.1.3 Transceiver board .64 9.1.1.4 Transceiver board assembly .64 9.1.1.5 Cable assemblies (media, transitions, connectors) .64 9.1.2 SCSI device connector .64 9.1.3 Chip to board interface .64 9.1.4 Terminator connector .64 9.2 Acceptance criteria 64 9.3 Behavioral
40、model validation procedure .64 9.3.1 Transceiver 64 9.3.2 Bulk cable .65 9.3.3 Connector .65 9.3.4 Terminator 65 9.4 Circuit model validation procedure 65 9.4.1 Overview 65 9.4.2 Validation methods .65 9.4.3 Cable assemblies .65 9.4.4 Transceiver boards, target boards, and backplanes 65 9.5 System m
41、odel validation procedure 65 10 Simulation strategy .66 10.1 System configuration .66 10.2 Data patterns .66 10.2.1 Overview 66 Copyright American National Standards Institute Provided by IHS under license with ANSI Licensee=IHS Employees/1111111001, User=OConnor, Maurice Not for Resale, 04/29/2007
42、13:51:29 MDTNo reproduction or networking permitted without license from IHS -,-,- v 10.2.1.1 TDT DATA IN phase training pattern 66 10.2.1.2 DATAOUT phase training pattern .68 10.3 Data rates 70 10.4 Instrumentation Models .70 Annex A Model database strategy71 A.1 Overview .71 A.2 Location 71 A.3 Da
43、tabase content 71 A.4 License/confidentiality agreements .71 A.4.1 No-fee license agreement 72 Annex B N-Port Networks.73 B.1 Overview .73 B.2 2-Port network parameter conversions .75 Annex C Preliminary Results on Correlating Simulation Models with Actual Waveform78 C.1 Purpose 78 C.2 Simulation Ov
44、erview .78 C.3 Details of Simulation .79 C.4 Conclusions 80 Copyright American National Standards Institute Provided by IHS under license with ANSI Licensee=IHS Employees/1111111001, User=OConnor, Maurice Not for Resale, 04/29/2007 13:51:29 MDTNo reproduction or networking permitted without license
45、from IHS -,-,- vi Tables Table 1 - Recommended load circuits and waveforms for V/s data extraction.31 Table 2 - IBIS file header information.32 Table 3 - IBIS file revision levels 33 Table 4 - IBIS file component and pin information33 Table 5 - IBIS file Model parameters34 Table 6 - IBIS file temper
46、ature and voltage range information.35 Table 7 - IBIS file I/V data information35 Table 8 - Incorrect clamp data table entry37 Table 9 - Correct clamp data table entry37 Table 10 - IBIS file ramp and waveform information 37 Table 11 - Cable assembly test instrumentation 65 Table 12 - PCB test instru
47、mentation.65 Table 13 - Data rates and signal characteristics .70 Table C.1 - Simulation model types78 Copyright American National Standards Institute Provided by IHS under license with ANSI Licensee=IHS Employees/1111111001, User=OConnor, Maurice Not for Resale, 04/29/2007 13:51:29 MDTNo reproducti
48、on or networking permitted without license from IHS -,-,- vii Figures Figure 1 - Architecture for modeling minimal bus segments 14 Figure 2 - Measurement and interoperability points.17 Figure 3 - SSM applicability to a SCSI segment.18 Figure 4 - Modeling architecture for launching a specific signal at a connector.19 Figure 5 - Simulation environment21 Figure 6 - Relationship between SPI-x and modeling rise times22 Figure 7 - I/V simulation example.27 Figure 8 - Ramp data simulation examp