JIS-C-7032-1993-R2004-ENG.pdf

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1、UDC 621.382.3 JAPANESE INDUSTRIAL STANDARD General rules for transistors Translated and Published by Japanese Standards Association Printed in Japan 10 s Copyright Japanese Standards Association Provided by IHS under license with JSALicensee=IHS Employees/1111111001, User=Wing, Bernie Not for Resale

2、, 03/15/2007 08:07:11 MDTNo reproduction or networking permitted without license from IHS -,-,- In the event of any doubt arising, the original Standard in Japanese is to be final authority. Copyright Japanese Standards Association Provided by IHS under license with JSALicensee=IHS Employees/1111111

3、001, User=Wing, Bernie Not for Resale, 03/15/2007 08:07:11 MDTNo reproduction or networking permitted without license from IHS -,-,- JIS C*7032 73 W 4733608 0536703 228 = UDC 621.382.3 JAPANESE INDUSTRIAL STANDARD J I S General rules for transistors C 7032-1993 1. transistors and field effect transi

4、stors, used for electronic appliance (hereafter the both are called as “transistors“). Scope This Japanese Industrial Standard specifies general items of bipolar Remarks 1. The following Standards are cited in this Standard: JIS C 0301 Graphical symbols for electrical apparatus JIS C 7021 Environmen

5、tal testing methods and endurance testing methods for discrete semiconductor devices JIS C 7030 Measuring methods for transistors JIS C 7210 General rules for reliability assured discrete semiconductor devices JIS Z 8202 Quantity symbols, unit symbols and chemical symbols JIS Z 8203 SI units and the

6、 use of their multiples and of certain other units The International Standards corresponding to this Standard are given below: IEC 747-1 (1983) Semiconductor devices, Discrete devices and integrated circuits Part 1 : General IEC 747-7 (1988) Semiconductor discrete devices and integrated circuits Par

7、t 7 : Bipolar transistors IEC 747-8 (1984) Semiconductor devices, Discrete devices Part 8 : Field-effect transistors 2. 2. Definitions 2.1 Threshold value of rating which shall not be ex- ceeded even for a moment, and the threshold values which shall not be reached in any two items at the same time,

8、 if specified values are determined on 2 or more items. Absolute maximum rating The voltage and the current related to this parameter mean d.c. or peak values. 2.2 (1) storage temperature (Tstc) (2) junction temperature (Tj) Bipolar transistor The definitions for bipolar transistors are given below.

9、 Allowable range of ambient temperature at the time of storage without voltage application. The maximum allowable value of apparent junc- tion temperature in a semiconductor which indicates the correlation of ther- mal conditions and electric conditions in a bipolar transistor. Copyright Japanese St

10、andards Association Provided by IHS under license with JSALicensee=IHS Employees/1111111001, User=Wing, Bernie Not for Resale, 03/15/2007 08:07:11 MDTNo reproduction or networking permitted without license from IHS -,-,- J I S C*7032 93 4933608 0516702 164 I 2 C 7032-1993 collector-base voltage (VCB

11、O) The maximum allowable value of voltage ap- plicable in the reverse direction of collector junction with the emitter open. emitter-base voltage (VEBO) plicable in the reverse direction of emitter junction with the collector open. The maximum allowable value of voltage ap- collector-emitter voltage

12、 ( VCEO) the reverse direction of collector junction with the base open. collector current (IC) continuously in the reverse direction of collector junction when a forward volt- age is applied between the emitter and the base. The maximum allowable value of voltage in The maximum allowable value of c

13、urrent able to pass emitter current (IE) The maximum allowable value of current able to pass continuously in the forward direction of emitter junction when the collector and the base are short circuited. “ base current (In) through base continuously, by applying forward voltage between emitter and T

14、he maximum allowable value of current able to pass base, with the emitter short circuited to the collector. total power dissipation (Ptd or collector power dissipation (P,) The maxi- mum allowable value of total power which can be dissipated, or that of the power which can be dissipated at collector

15、 junction, under specified heat radiation conditions. below. Field effect transistor The definitions for field effect transistors are given storage temperature (Tstg) Allowable range of ambient temperature at the time of storage without voltage application. junction temperature (Tj) The maximum allo

16、wable value of apparent junc- tion temperature in a semiconductor which indicates the correlation of ther- mal conditions and electrical conditions in a field effect transistor. channel temperature ( TcJ nel temperature in a semiconductor which indicates the correlation of thermal conditions and ele

17、ctrical conditions in a field effect transistor. The maximum allowable value of apparent chan- gate-drain voltage (VGD) between the gate and the drain when the source is brought under specified The maximum allowable value of voltage applicable conditions. gate-source voltage (VGS) plicable between t

18、he gate and the source when the drain is brought under specified conditions. drain-source voltage (VUS) plicable between the drain and the source when the gate is brought under specified conditions. drain current (ID) The maximum allowable value of current which can be passed through the drain when

19、the specified voltage is applied between the drain and the source while the specified conditions are maintained between the gate and the source. The maximum allowable value of voltage ap- The maximum allowable value of voltage ap- Copyright Japanese Standards Association Provided by IHS under licens

20、e with JSALicensee=IHS Employees/1111111001, User=Wing, Bernie Not for Resale, 03/15/2007 08:07:11 MDTNo reproduction or networking permitted without license from IHS -,-,- J I S C*7032 93 m 4933608 0536703 OTO m a a a a 3 C 7032-1993 (8) gate current (IG) The maximum allowable value of current whic

21、h can be passed through the gate. (9) total power dissipation (Ptd or drain-source power dissipation ( P D ) maximum allowable value of total power which can be dissipated, or that of the power which can be dissipated at the drain junction and the channel, The 2.4 Pulse remonse characteristic 2.4.1

22、in Fig. 1. Pulse response waveform The pulse response waveform shall be as given Fig, 1. Pulse response waveform (1) Bipolar transistor (2) Field effect transistor Input pulse Time t- Time t c H “1 1 0 O ;j a 100 4 8 96 Time t - Time t - Output pulse 2.4.2 Bipolar transistor The pulse response chara

23、cteristic of bipolar transistors is defined by the following parameters: (1) delay time ( t d ) The time interval from the instant when the input pulse reaches to 10 % of its amplitude to the instant when the output pulse reaches to 10 % of its amplitude (see Fig. 1). from 10 % to 90 % of its amplit

24、ude (see Fig. 1). reaches to 10 % of its amplitude to the instant when the output pulse reaches to 90 % of its amplitude (see Fig. 1). (2) rise time (t,) (3) turn-on time (ton) The time interval necessary for the output pulse to increase The time interval from the instant when the input pulse (4) ca

25、rrier storage time (t,) The time interval from the instant when the input pulse decreases to 90 % of its amplitude to the instant when the output pulse decreases to 90 % of its amplitude (see Fig. 1). Copyright Japanese Standards Association Provided by IHS under license with JSALicensee=IHS Employe

26、es/1111111001, User=Wing, Bernie Not for Resale, 03/15/2007 08:07:11 MDTNo reproduction or networking permitted without license from IHS -,-,- J I S CS7032 93 4933608 0516704 T37 W 4 C 7032-1993 (5) - fall time (tl) (6) turn-off time (toff) The time interval necessary for the output pulse to decreas

27、e from 90 % to 10 % of its amplitude (see Fig. 1). decreases to 90 % of its amplitude to the instant when the output pulse reaches to 10 % of its amplitude (see Fig. 1). The time interval from the instant when the input pulse 2.4.3 Field-effect transistor The pulse response characteristic of field-e

28、ffect transistors is determined by the following parameters: turn-on delay time td (on) input pulse reaches to 10 % of its amplitude to the instant when the output pulse reaches to 10 % of its amplitude (see Fig. 1). rise time (t,) from 10 % to 90 % of its amplitude (see Fig. 1). turn-on time (to,)

29、E c h e s to 10 % of its amplitude to the instant when the output pulse reaches to 90 % of its amplitude (see Fig. 1). turn-off delay time td(,rD input pulse decreases to 90 % of its amplitude to the instant when the output pulse decreases to 90 9 6 of its amplitude (see Fig. 1). fall time (tf) from

30、 90 % to 10 % of its amplitude (see Fig. 1). turn-off time (tor) decreases to 90 % of its amplitude to the instant when the output pulse reaches to 10 9 6 of its amplitude (see Fig. 1). The time interval from the instant when the The time interval necessary for the output pulse to increase The time

31、interval from the instant when the input pulse The time interval from the instant when the The time interval necessary for the output pulse to decrease The time interval from the instant when the input pulse Detail specification When the rating, performance and external shape of in- divid-expressed

32、based on this standard, such data shall be specified in the relevant detail specifications. 4. Symbol JIS C 0301. The graphical symbols used for this standard shall be those given in And the unit symbols shall be those given in JIS 2 8202 and JIS 2 8203. 5. Classification Transistors are classified

33、as given in Table 1. Copyright Japanese Standards Association Provided by IHS under license with JSALicensee=IHS Employees/1111111001, User=Wing, Bernie Not for Resale, 03/15/2007 08:07:11 MDTNo reproduction or networking permitted without license from IHS -,-,- - - _ J I S C*7032 93 4933608 0536705

34、 973 o e e o Classification item Usage Structure 5 C 7032-1993 Table 1. Classification of transistors Classification (1) For high frequency : high-frequency amplification, frequency conversion, frequency mixing, local oscillation, high-frequency oscillation, high-frequency power application, high-fr

35、equency low-noise amplification power amplification, low-frequency low-noise amplification (2) For low frequency : low-frequency amplification, low-frequency (3) For switching : high-speed switching, low-speed switching (1) Bipolar transistor (a) Polarity - PNP type, NPN type (b) Type of junction al

36、loyed junction grown junction -E diffused junction (2) Field effect transistor (a) Channel - P-channel type, N-channel type (b) Gate structure junction-gate type (including Schottky barrier-gate type) insulated-gate type enhancement mode depletion mode 6. Ratings The maximum rating means the absolut

37、e maximum rating. The specified parameters for maximum rating shall be as shown in blank detail specifications stated in Annexes 2 and 3. 7. Performances 7 . 1 Electrical characteristics The electrical characteristics of transistors are specified by the parameters shown in the blank detail specifica

38、tions stated in Annexes 2 and 3. The values of temperature, voltage and current shown in Table 2 are recommended for the conditions of measurements to decide the characteristics. Table 2. Recommended values for conditions of measurements to decide characteristics Temperature Voltage Current -65C, -5

39、5“C, -25“C, -1OC, +25“C, +40C, +45C, +55C, +60“C, +70C, +85“C, +lOO“C, +125“C, +150“C, +175“C, +2004C, +250“C, +300“C 1.0, 1.25, 1.6, 2.0, 2.5, 3.2, 4.0, 5.0, 6.3, 8.0 ( X 1PV) (1) Small-signal transistor : 1, 2, 5 ( x 10nA) (2) Power transistor : 1.0, 1.6, 2.5, 4.0, 6.3 ( X 1PA) I Remarks: The n is

40、 a positive or negative integer. Copyright Japanese Standards Association Provided by IHS under license with JSALicensee=IHS Employees/1111111001, User=Wing, Bernie Not for Resale, 03/15/2007 08:07:11 MDTNo reproduction or networking permitted without license from IHS -,-,- J I S CU7032 93 4933608 0

41、536706 BOT W 6 C 7032-1993 7.2 Performances relating to environment and endurance The performances relating to environmental conditions shall be checked on the specified items in the I environmental tests stated in JIS C 7021, and reliability assurance procedures of transistors for which reliability

42、 is required shall be as specified in JIS C 7210. 8. Measurements Unless otherwise specified, measurements of transistors shall follow JI% C 7030. 9. Markings 9.1 sistor. If the marking is difficult, the abbreviation of type designation shall be marked. (1) Type designation (2) Manufacturers name or

43、 abbreviation (3) Marking on product The items stated below shall be marked on each tran- Year and month of manufacture or their abbreviation 9.2 tion of each package: (1) Type designation (2) Manufacturers name or abbreviation (3) charge caution mark specified in Annex 1 shall be marked. Marking on

44、 package The following items shall be marked on a suitable posi- Year and month of manufacture or their abbreviation Further, for transistors which may be broken by static charge, the static 10. charge, the following items shall be taken care: Precaution for handling For transistors which may be bro

45、ken by static (1) At the time of transportation, storage and standing, electrostatic charging shall be prevented by using electrostatic conductive materials, charge preven- tive treatment materials, etc. The measurements shall be carried out in a place where electrostatic charge will not be generate

46、d. It is desired that the relative humidity is about 50 %. To prevent generation of electrostatic charging, it is necessary to make the electrostatic potential of operator, tools and measuring apparatus equal to the electrostatic potential of the place where the transistors to be measured are handle

47、d. (2) Copyright Japanese Standards Association Provided by IHS under license with JSALicensee=IHS Employees/1111111001, User=Wing, Bernie Not for Resale, 03/15/2007 08:07:11 MDTNo reproduction or networking permitted without license from IHS -,-,- 7 C 7032-1993 Annex 1 Fig. 1 Annex 1 Fig. 2 Annex 1

48、. Marking on devices which may be broken by electrostatic charge Any mono-color distinguishable from the substrate. However, red shall be excluded. Mainly marked by printing. The symbol which indicates that the device requires precaution for handling because it may be broken by electrostatic charging shall be as stated below (as stated in IEC 747-1). Annex 1 Fig. 3 The substrate shall be yellow. Letters and symbol shall be black. I 1. of equipment or on the device if possible. It shall also be marked on th

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