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1、OV511+Advanced Camera to USB BridgeOmniVision Technologies, Inc.May 13, 2000Data Sheet Rev. 1.2OmniVision Technologies, Inc. reserves the right to make changes without further notice to anyproduct herein to improve reliability, function or design. OmniVision does not assume any liabilityarising out
2、of the application or use of any project, circuit described herein; neither does it convey any license under its patent nor the right of others.This document contains information of a proprietary nature. None of this information shall be divulged to persons other than OmniVision Technologies, Inc. e
3、mployee authorized by the natureof their duties to receive such information, or individuals or organizations authorized by OmniVision Technologies, Inc.Content1Features.42Architecture.52.1General Description .52.2Functional Description.62.2.1Camera Interface .62.2.2DRAM Interface.72.2.3OmniCE.82.2.4
4、ISO FIFO .92.2.5UDC interface .102.2.6System Control.102.2.7USB Device Controller .112.2.8SCCB (Serial Camera Control Bus).112.2.9PIO .112.2.10Custom ID.133Pin Definition.143.1Pin Assignments .143.2Pin Descriptions.154Electrical Characteristics .175Register Table (Vendor Commands) .185.1CAMERA INTER
5、FACE .185.2DRAM INTERFACE.195.3ISO FIFO.195.4PIO .205.5SCCB .205.6SYSTEM CONTROL .225.7OmniCE .236USB Descriptors .246.1Device.246.2Configuration.246.3Interface & Endpoint .246.3.1Alternate 0 .256.3.2Alternate 1 .256.3.3Alternate 2 .256.3.4Alternate 3 .266.3.5Alternate 4 .266.3.6Alternate 5 .276.3.7
6、Alternate 6 .276.3.8Alternate 7 .277Software Package.298Mechanical Information .301IllustrationsFIGURE 1.FUNCTIONAL BLOCK DIAGRAM.5FIGURE 2.CAMERA INTERFACE YUV - 4:2:2 - 16-BIT HORIZONTAL TIMING WAVEFORMS6FIGURE 3.CAMERA INTERFACE VERTICAL INTERLACE TIMING WAVEFORMS.6FIGURE 4.CAMERA INTERFACE VERTI
7、CAL PROGRESSIVE TIMING WAVEFORMS.7FIGURE 5.MEMORY MAP .7FIGURE 6.DRAM INTERFACE WRITE CYCLE TIMING WAVEFORMS .7FIGURE 7.DRAM INTERFACE READ CYCLE TIMING WAVEFORM.8FIGURE 8.DRAM INTERFACE REFRESH CYCLE TIMING WAVEFORMS.8FIGURE 9.STRUCTURE OF OMNICE.9FIGURE 10.SOF/EOF FORMATS.9FIGURE 11.CLOCK SCHEME O
8、F OV511+.10FIGURE 12.USB COMMUNICATION FLOW.11FIGURE 13.PIO READ CYCLE TIMING WAVEFORMS .12FIGURE 14.PIO WRITE CYCLE TIMING WAVEFORMS .12FIGURE 15.100-PIN PQFP PACKAGE.142TablesTABLE 1.CAPABILITY OF CAMERA INTERFACE .6TABLE 2.MAXIMUM PIXEL COUNT OF ONE 256KX16 DRAM .6TABLE 3.PARAMETERS OF DRAM INTER
9、FACE TIMING.8TABLE 4.PARAMETERS OF PIO TIMING.13TABLE 5.PIN DESCRIPTIONS.15TABLE 6.DC ELECTRICAL CHARACTERISTICS.17TABLE 7.ABSOLUTE MAXIMUM RATINGS .17TABLE 8.RECOMMENDED OPERATING CONDITIONS .17TABLE 9.USB DC ELECTRICAL CHARACTERISTICS .17TABLE 10.USB FULL SPEED OUTPUT DRIVER ELECTRICAL CHARACTERIS
10、TICS .17TABLE 11.CAMERA INTERFACE REGISTER LIST .18TABLE 12.DRAM INTERFACE REGISTER LIST .19TABLE 13.ISO FIFO REGISTER LIST .19TABLE 14.PIO REGISTER LIST .20TABLE 15.SCCB REGISTER LIST.20TABLE 16.SYSTEM CONTROL REGISTER LIST.22TABLE 17.OMNICE REGISTER LIST .23TABLE 18.DEVICE DESCRIPTOR LIST .24TABLE
11、 19.CONFIGURATION DESCRIPTOR LIST .24TABLE 20.INTERFACE DESCRIPTOR LIST OF ALTERNATE 0 .25TABLE 21.ENDPOINT DESCRIPTOR LIST OF ALTERNATE 0, PACKET SIZE 0.25TABLE 22.INTERFACE DESCRIPTOR LIST OF ALTERNATE 1 .25TABLE 23.ENDPOINT DESCRIPTOR LIST OF ALTERNATE 1, PACKET SIZE 33.25TABLE 24.INTERFACE DESCR
12、IPTOR LIST OF ALTERNATE 2 .25TABLE 25.ENDPOINT DESCRIPTOR LIST OF ALTERNATE 2, PACKET SIZE 129.26TABLE 26.INTERFACE DESCRIPTOR LIST OF ALTERNATE 3 .26TABLE 27.ENDPOINT DESCRIPTOR LIST OF ALTERNATE 3, PACKET SIZE 257.26TABLE 28.INTERFACE DESCRIPTOR LIST OF ALTERNATE 4 .26TABLE 29.ENDPOINT DESCRIPTOR
13、LIST OF ALTERNATE 4, PACKET SIZE 385.26TABLE 30.INTERFACE DESCRIPTOR LIST OF ALTERNATE 5 .27TABLE 31.ENDPOINT DESCRIPTOR LIST OF ALTERNATE 5, PACKET SIZE 513.27TABLE 32.INTERFACE DESCRIPTOR LIST OF ALTERNATE 6 .27TABLE 33.ENDPOINT DESCRIPTOR LIST OF ALTERNATE 6, PACKET SIZE 769.27TABLE 34.INTERFACE
14、DESCRIPTOR LIST OF ALTERNATE 7 .27TABLE 35.ENDPOINT DESCRIPTOR LIST OF ALTERNATE 7, PACKET SIZE 961.2831 FeaturesLow cost, integrated solution for USB PC camera applicationsBuilt-in USB transceiver with selectable external USB transceiver interface1USB compliance current consumption in unconfigured,
15、 configured, suspend & operating modesUSB full speed signaling bit rateUSB high powered, bus powered deviceSupports USB control and isochronous pipesSupports 8 isochronous interface alternates of up to 7.5Mbps USB transfer rate256Kx16, 5V, EDO, CAS-BEFORE-RAS refresh, 60ns DRAM requiredCamera Interf
16、ace: 16-bit YUV 4:2:2/RGB raw data formats (two channels) or 8-bit Y 4:0:0/RGB raw data formats (one channel only) Supportsclamping,down-scaling&filteringcircuitsfordifferentvideoformats (VGA/SIF/QSIF or CIF/SIF/QCIF/QSIF)Supports proprietary real-time compression engine of up to 8:1 (1015fps at VGA
17、)VGA resolution uncompressed still image with snapshot buttonSupports SCCB (Serial Camera Control Bus) master function running at 100KHz (normal mode)Supports programmable LED controlSupports programmable switching power clock with frequencies of 24K/48K/96K/192KHz 42 Architecture2.1 General Descrip
18、tion2OV511+based on OV511, is a low cost and highly integrated solution for USB PC camera applications. It remains OV511s performance unchanged or is improved, while some new features were implemented. New features include built-in USB transceiver with selectable external USB transceiver interface,
19、more effective packet size of the isochronous pipe, programmable LED control, programmable switching power clock with frequencies of 24K/48K/96K/192KHz, etc. OV511+is a USB PC camera controller that includes a proprietary compression engine supporting real time image transfer through USB bus. A comp
20、lete USB camera system consistsof OV511+, a 256Kx16 EDO DRAM, and a digital camera such as OV7620 for VGA resolution orOV6620 for CIF resolution.Camera Interface generates different image formats by taking either 16-bit YUV 4:2:2/RGB rawdata or 8-bit Y 4:0:0/RGB raw data inputs. OmniCE is the propri
21、etary compression engine. It notonly performs 1015fps for VGA and 30fps for CIF, but also allows very fast decompression withlow CPU utilization. Depending on the camera device that is built with the system, either SCCBor Parallel IO bus can be chosen. The SCCB bus master uses two dedicated pins “SI
22、O-0” & “SIO-1”, while the PIO shares with Y & UV buses. Snapshot button allows users to take a highquality, VGA resolution uncompressed still imageThe functional blocks of OV511+, as shown in the following figure, consist of Camera Interface,DRAM Interface, OmniCE, UDC interface, ISO FIFO, System Control, SCCB and PIO.Figure 1. Functional Block Diagram256Kx16 DRAMOV7610OV662048MHzUSBHRE