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1、WiMAX MIMO Demo System Design Documentation SYSTEM ENGINEERING TABLE OF CONTENTS TABLE OF CONTENTS .I 1WIMAX MIMO DEMO SYSTEM SPECIFICATIONS.1 1.1OVERALL SYSTEM PARAMETERS.1 1.2MIMO DEMO SYSTEM SETUP.2 2DELTA SPECS OVER BASELINE SYSTEM.2 2.1FRAME STRUCTURE.2 2.2SUBCARRIER MAPPING.2 2.2.1Downlink sub
2、carrier mapping.2 2.2.2Uplink subcarrier mapping .3 2.3CODING AND MODULATION.4 2.3.1Coding .4 2.3.2Modulation .4 2.4ADAPTIVE ANTENNA SYSTEMS.4 2.4.1Antenna configuration.4 2.4.2Downlink.5 2.4.3Uplink.5 2.4.4Transmitter block diagram for STC and SM.5 2.4.5Receiver block diagram for STC and SM.5 2.4.6
3、Supported ACM combinations.6 2.5PREAMBLE.7 2.6MAP SUPPORT FOR MIMO .8 2.6.1Frame Control Messages (FCM) and channel quality feedback .8 2.6.2MIMO operation procedure.8 3PHY LAYER ALGORITHMS.9 3.1DOWNLINK AGC ALGORITHM.9 3.2DOWNLINK PREAMBLE PROCESSING.10 3.2.1Timing/Frequency acquisition using pream
4、ble auto-correlation.12 3.2.2Cell/Sector ID detection and frequency integer part estimation.13 3.2.3Channel profiling, fine timing adjustment, full band channel estimation.13 3.2.4Post SINR estimation and subchannel selection .14 3.2.5Mobile/Fixed mode detection.14 3.3FREQUENCY TRACKING AND SAMPLING
5、 CLOCK ERROR ESTIMATION.15 3.4PHASE NOISE COMPENSATION.16 3.5DOWNLINK CHANNEL ESTIMATION.16 3.6POWER CONTROL.17 3.7UPLINK CHANNEL ESTIMATION.17 3.8METRICS GENERATION.17 3.9UPLINK MAXIMUM RATIO COMBINING (MRC) .17 4PLATFORM AND TASK PARTITIONING .17 4.1HARDWARE PLATFORM OVERVIEW.18 4.2BS FUNCTION PAR
6、TITIONING OVERVIEW.19 4.3SS FUNCTION PARTITIONING OVERVIEW.19 1 WIMAX MIMO DEMO SYSTEM SPECIFICATIONS 1.1Overall system parameters Channel bandwidth: 10MHz Sampling frequency: 10Msps FFT size: 1024 (102.4us) CP length: 1/8*1024=128 (12.8us) Symbol duration: FFT + CP = 1152 (115.2us) Downlink subcarr
7、ier mapping: PUSC Instead of transmitting the same CSS symbol across the whole network, we modulate CSS with different PN code for cell/sector identification. The PN code uses a truncate version (the first 425 bits) of 2048-FFT preamble sequence as defined in Table 309 of 16d. To facilitate the chan
8、nel estimation in the MIMO demo system, 2 transmit antennas at the BS shall transmit the preamble simultaneously. The first antenna should use the PN sequence specified above, and the second antenna shall transmit the sequence obtained by modulating the original one by +1,-1,+1,-1, . To be more spec
9、ific, Let p(n) be the PN sequence used by antenna 1, the preamble for the 2nd antenna, q(n), is q(n) = p(n) * exp(j*pi*n) for n = 0,1,. The algorithms related to the preamble processing, including timing and frequency acquisition, channel profiling and channel quality estimation are explained in the
10、 subsequent section. 2.6 MAP support for MIMO 2.6.1 Frame Control Messages (FCM) and channel quality feedback The coding/modulation scheme for FCM is 16QAM 1/2 with STC (Alamouti code), without repetition. Among all the MAP_IEs defined in the baseline SISO system, the following are modified to suppo
11、rt MIMO operation: DL_AMC_MAP_IE DescriptorBitsNote CID8 DIUC for antenna 14 DIUC for antenna 24 Subchannel Index6 Number of Subchannels2 Channel quality feedback SyntaxBitsNotes Mobile_mode_indication4Fixed mode = 0b0000; mobile mode = 0b1111; If (Mobile_mode_indication = 0b1111) DIUC4 Reserved168S
12、hall be set to zero else For (i=0;i= P Instantaneous decision=Mobile Instantaneous decision=Mobile Instantaneous decision=Fixed 3.3 Frequency Tracking and Sampling Clock Error Estimation Due to the lack of commonly used continuous pilot tones (CPT), the frequency tracking, sampling clock error estim
13、ation, and the common phase error (CPE) caused by the phase noise have to use the scattered pilot tones. Pilot arrangement in PUSC and AMC are different. The PUSC has pilots on the same subcarrier every two symbols, while in AMC zone the scattered pilot repeats every 6 symbols. Therefore, the tracki
14、ng parameter has to be calculated with different parameters in PUSC and AMC respectively, though the algorithm used is about the same. We will use PUSC as an example to describe the algorithm The received pilot tones in certain subcarriers are extracted first and differentiated in time dimension. Th
15、e phases of differentiated pilot tones contain the frequency offset and sampling clock error information. Specifically, the intercept of the phase sequence, i.e. the common phase rotation among all pilot tones can be used to estimate the fine frequency offset. The slope of the phase sequence conveys
16、 the information on the sampling clock error. When selected pilot tones for the tracking purpose are evenly distributed between lower half and higher half frequency band, some simplifications can be made to find the intercept and the slope. The following figure illustrates the idea. The carrier and
17、sampling clock error are estimated using PUSC and AMC respectively and the result is average for adjustment/compensation in the next frame. Also, moving average can be applied across several frames to smooth out noise. For algorithm details, please refer to the paper below: 3.4 Phase Noise Compensat
18、ion Due to the limited SS processing power and relative low SNR requirement in PUSC, we implement phase noise compensation algorithm only in AMC zone. 8 Subchannels in the AMC zone with the best channel gain are used for CPE compensation. First of all, the channel response on these 8 subchannels is
19、estimated. CPE introduced by the phase noise can be estimated from the remaining (after channel estimation) phase rotation of all pilot tones in a symbol. And such CPE is then compensated in all the other data subcarriers to remove the phase noise effect. 3.5 Downlink Channel Estimation Downlink cha
20、nnel can be estimated using the standard 2 1-D MMSE channel estimations, in which the time-dimension estimation is performed first followed by the frequency-dimension interpolation. Several sets of estimator coefficients suitable for different channel profile can be pre-computed and stored. DSP will
21、 choose the set that provides the best estimation quality. For both AMC and PUSC mapping, time-dimension estimation may use 3-4 closest received pilot tones, resulting in an estimation window of 6-8 symbols as pilot tones is spaced 2 symbols apart in the time dimension. Note the estimation window si
22、ze is limited by the processing delay requirement and the available memory for storing the received pilots. Frequency dimension estimator can consist of 4-6 taps. Similar to time dimension estimation, frequency estimation can also be performed in a sliding-window style. Note the pilot spacing in sub
23、carriers after the time dimension interpolation is not uniform for both AMC and PUSC mapping. A careful implementation is required to choose the appropriate estimator coefficients and to align the estimated channels. 3.6 Power Control The power control contains open loop and close loop mechanisms. T
24、he open loop algorithm performs the power control based on the downlink preamble. With the knowledge of BS transmitting power and the SS AGC gain settings, the path loss for the downlink can be calculated. Due to the reciprocal TDD channel, the uplink transmitting power is controlled to ensure the S
25、S signal reaching at the BS with a pre-determined power level (determined by the uplink coding/modulation scheme being used). The close loop power control is based on the initial/periodic ranging signal. The SS first transmits the ranging signal using the power calculated through open-loop algorithm
26、. The BS measures the received ranging signal and compares it against a predefined reference value. The difference is then fed to the terminal for fine power adjustment. The frequency of SS doing periodic ranging is yet to be studied. We may need to implement subchannel-based pre-boosting on top of
27、power control. 3.7 Uplink Channel Estimation For PUSC, use 2D MMSE within each tile. The 12 x 4 MMSE matrix is calculated offline and stored in memory. Please refer to reference xxx for algorithms on how to generate the matrix. 3.8 Metrics Generation Refer to the module design for details on the bit
28、 metric calculation. 3.9 Uplink Maximum Ratio Combining (MRC) The standard MRC combining is performed at the BS to achieve higher diversity and SNR gain. 4 PLATFORM AND TASK PARTITIONING 4.1 Hardware Platform Overview FPGA Xilinx XC2V4000 4M gates DAC AD6640/ AD6620 ADC/DUC AD9857 DIF DAC/DDC AD6640
29、/ AD6620 ADC/DUC AD9857 DIF RF Transceiver RF Transceiver MCU Intel IPX 425 EMIF HPI IF data interface DSP interconnection DSP 1y TI C6414 1GHz DSP 1x TI C6414 1GHz IF data interface DSP interconnection HPI EMIF DSP 2 TI C6416 1GMHz EMIFEMIF HPI EMIF Figure 6 Baseband hardware platform for the MIMO
30、demo system For the MIMO demo system, both BS and SS use the same baseband platform, as illustrated in the above figure. This baseband board consists of two 2 separate DIF interfaces and one 4M gates Virtex II FPGA, 2 1GHz TI C6414 DSP (DSP 1x and DSP 1y), one 1 GHz TI C6416 DSP (DSP 2), and one Int
31、el IPX 425 MCU. 4.2 BS Function Partitioning Overview Down sample FFT Up sample IFFT Fram- ing Defra ming Channel Estimati on Ranging Detection Modula -tion Encod- ing Alamo uti Decodi ng Metric Gener ation Deco ding FPGADSP1x/y DSP 2 Up convert er ADC Down Conv DIF RX TXTo MCU Frm MCU STC enc Figur
32、e 7 BS function partitioning overivew As shown in the above figure, the main task for the DSP1x / 1y includes framing for the uplink, and deframing, uplink channel estimation and ranging detection. The DSP2 is responsible for encoding and decoding, which includes downlink encoding, modulation and ST
33、C enc, and uplink Alamouti decoding, soft bit LLR calculation and turbo decoding. Refer to the Figure 2 and Figure 3 for the detailed transmitter structure for STC encoding. 4.3 SS Function Partitioning Overview Modula -tion Encod- ing Alamouti Decoding Metric Gener ation Decoding DSP 2 To MCU Frm M
34、CU STC Enc MIMO Detector (In FPGA) Down sample FFT Up sample IFFT Up convert er ADC Down Conv DIF RX TX Fram-ing Deframing Channel Estimation DSP1X Acquisition & Tracking Preamble processing Down sample FFT Up sample IFFT Up convert er ADC Down Conv DIF RX TX Fram-ing Deframing Channel Estimation DS
35、P1X Acquisition & Tracking Preamble processing FPGA Figure 8 SS function partitioning overview Figure 8 illustrates the function portioning between FGPA, DSP1 and DSP2 on SS side. Besides front end signal processing, FPGA also contains a 2x2 MIMO detector. The main tasks of DSP1X/Y include acquisition/tracking, framing/de-framing, channel estimation and preamble processing. Similar to BS side, coding and decoding are also performed in the DSP2.