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1、Enabling Technology and Process Development for Flip Chip Interconnects Speaker: Dr. Li Ming 2 ASM Pacific Technology Ltd. 2015 Presentation Outline Introduction to Flip Chip Interconnections Mass Reflow (MR) Process Challenges for Microbump Reflow Flux Cold Joint and Failure Analysis Thermal Compre
2、ssion Bonding (TCB) processes TCB Flux TCB NCP TCB NCF Challenges and solutions Flip Chip Interconnections Solder flip chipNon-solder flip chip BumpsSolder or Cu pillar with solder capNon-solder bumps Interconnection process Pre-underfillPost-underfillCu/CuACA/ICA/ NCA TC-NCPTC-NCF Prebond + mass re
3、flow TC-fluxTCTC/TS Mass Reflow vs. Thermal Compression Bonding 40 60 80 Bump Pitch (um) Die Thickness (um) Die size (mm) TCBMass Reflow Moving Boundary Reducing pitch Size/solder diameter: small solder volume Thin and large die: co-planarity Thin or coreless substrate: warpage Flux Applications Low
4、 flux residual Small die gap Dipping Inspection and control UPH concern Spray/jetting/printing High UPH Flux film Flux property requirement Cold Joint Analysis Die tilt PretreatmentPrebondReflow Cold joint Process PretreatmentPrebondReflow Cold joint Process DieSubstrateFluxMaterialDieSubstrateFluxM
5、aterial TCB Process Approaches TCB Postappliedunderfill (TCBflux) NonconductiveFilm (NCF) NonconductivePaste (NCP) Preappliedunderfill (NCP/NCF) LiquidPhaseContact (LPC) SolidPhaseContact (SPC) Small force Force/position control Large force Force/position control Liquid Phase Contact (LPC) TCB-flux
6、Process Flow 3. Search contact, pulse heating and cooling To remove OSP To remove oxides Alignment Thermal compensation Pulse heating & cooling cover a large portion of bonding cycle time Flux dipping 1. Flux apply BH Force, heat, time Heat Force, heat, time Heat BH Flux printing/spraying BH 2. Alig
7、nment BH 4. Underfilling & curing Underfill cure underfill methods: CUF, MUF Solid Phase Contact (SPC) LPC Process Advantages UPH is higher Compensation for variation in bump and solder thickness Good solder wetting Solder height control Low substrate temperature Issues Flux applying on the substrat
8、e or using a high temperature flux TC-NCP Process Key Issues NCP voiding NCP filler entrapment Solder non-wetting Solder voids Low UPH Bonding profile control NCP entrapmentNCP voids Alignment Heat Force, heat, time NCP post - cure Heat TCB + NCP curing Dispensing Force, heat, time - NCP dispensing
9、Pre-treatment Alignment Substrate pre- treatment TC-NCF process Key Issues NCF voids Advantages Thin die bonding Wafer level NCF Multi-die bonding Alignment Alignment Heat Force, heat, time NCF post - cure Heat TCB + NCF curing Force, heat, time - Substrate treatment Pre-treatment NCF lamination on
10、wafer and dicing Lamination Temperature Force Time Good joints 12 ASM Pacific Technology Ltd. 2015 Different Package Structure Chip to Substrate (C2S) Chip to chip to substrate (C2C2S) Chip to wafer (C2W) Challenges for TCB Process Low UPH Solutions Liquid Phase Contact (LPC) Bonding Multi Die Bonding 14 ASM Pacific Technology Ltd. 2015