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1、Sources of Voids,Sources of Voids,锡球生产的方式,Sources of Voids,芯片植球的过程,芯片Mount在主板上的过程,有机会消散掉,三明治结构让气泡无法散去,Sources of Voids, Shrinkage the interior of a solder joint is the last part of the joint to solidify so you expect it to have a void. Moisture and contaminates supply gases that can be trapped. Flux
2、 in the paste degrades and becomes gaseous during ramp-up in the reflow oven. On a BGA the gases are tightly sandwiched between two surfaces and the voids that occur typically rise to the top of the solder joint. A high ramp rate can cause more voiding by not allowing time for void migration out of
3、the joint (ramp rate example, 75 vs. 60C/minute) Paste flux to attach PBGAs tends to produce fewer voids than with solder paste. Too much flux added during the rework process can cause voids. Proper oven profile and clean parts can reduce solder voids 锡球内的气泡通常导因于锡球陷缩,湿气与锡膏挥发物 陷缩:通常,锡球的内部是在整个焊点的固化过程中
4、最后冷却凝固的部份,可以预期这样的现象会导致陷缩孔产生 湿气跟污染物在挥发时被锡球捕捉而形成锡球内气孔 锡膏内的助焊剂在回焊炉升温的过程中因为降解而呈现汽化的状态.而在BGA中,挥发的气体将被紧包在像三明治一样的两层PCB板间,而产生的气泡也通常会上升到锡球的上方.通常一个比较快速的升温曲线会使锡球内产生更多的气泡,因为没有足够的时间让气泡可以移动到锡球表面消散掉 PBGA所使用的助焊膏比锡球用的助焊剂较不易产生气泡 在维修过程中所加入的过多助焊剂会导致锡球产生气泡 合适的炉温及干净的零件会降低锡球产生气泡,Sources of Voids: Especially for ImAg Board
5、,Galvanic Corrosion:电镀锈蚀腐蚀,当两种不同的金属直接接触并曝露在水或含融盐的水等电解质中，会产生电镀锈蚀腐蚀。电流会在两种金属之间流动，类似电池的化学反应因而产生。两种金属之间的电位差越大，氧化的速度越快；反之，电位差越小，氧化的速度越慢。而铜与银之间的电位差使得铜箔表面出现陷穴,Sources of Voids: Especially for ImAg Board,Immersion Ag,Cu cave,Flux,IMC,IMC,IMC,铜箔中的陷穴,导致了气泡的生成,IPC-7095B对锡球的描述,Type A: Void(s) within the ball (p
6、ackage level) as received. Type B: Void(s) at the ball/package substrate interface as received. Type C: Void(s) within the ball after board level assembly process. Type D: Void(s) at the ball/package substrate interface after board level assembly process. Type E: Void(s) at the ball/board substrate
7、interface after board level assembly process.,Voids classification in IPC-7095B,Macrovoidsare the most widely occurring voids in solder joints. These are caused by volatile compounds that evolve during the soldering processes. These macrovoids generally do not affect the solder joint reliability unl
8、ess they are present at interfacial regions in the solder joints where cracks typically propagate. Macrovoids 是最常在锡球中广泛出现的Void,导因是挥发性的成分在焊接过程中释出的气体.这类的Void并不会影响锡球的可靠度,除非是在出现在交界面上的Void,因为这类的Void通常会使裂痕增长 Planar Microvoidsare a series of small voids, in relatively the same plane, located at the interfa
9、ce between the PCB Lands and the solder. These are caused by copper caves under ImAg- surface-finish coated lands. They do not affect initial product quality, but can affect long term solder joint reliability. Planar Microvoids是位在同一平面的一系列小气泡,且通常座落在PCB面与Solder之间.这通常来自于化银板表面处理上的铜的孔洞.虽然不会影响初期的产品质量但是却会对
10、solder的寿命产生影响(化银板容易有微气泡) Shrinkage Voids are caused by the shrinkage during solidification, mostly for SAC and other lead-free solders. They do not generally appear near the solder-to-PCB land interface and do not impair the solder joint reliability. Shrinkage Voids导因于固化过程的收缩,常出现于Sn-Ag-Cu等无铅锡球上.这些Vo
11、id不会出现在锡球跟PCB的接面上,且不会损害锡球的可靠度,Voids classification in IPC-7095B,Microvia Voidsare caused by the presence of microvias designed in the PCB lands. Large Microvia Voids, if located in solder joints in high stress areas of a package, can impact solder joint reliability. Microvia Voids是因为将微盲孔的设计应用在PCB板上所
12、造成的.大型的微盲孔,如果位置是在芯片高应力区的锡球中,将会冲击到锡球的可靠度 IMC Microvoidsoccur within the Intermetallic Compound (IMC) formed between copper and high tin solders, including SAC and tin/lead solders. These IMC Microvoids do not form immediately after the soldering process, but after aging at high temperatures or during
13、 temperature cycling of the solder joints. The true root cause is still under investigation, but a Kirkendall voiding mechanism may play a part. These voids can affect solder joint reliability, particularly in instances when brittle fracture is initiated within the IMC during drop or mechanical shoc
14、k to the solder joint. IMC Microvoids通常发生在含锡量高的锡球中的IMC层内锡球与铜之间,包括Sn-Ag-Cu跟锡/铅类的锡球.这类IMC中的Microvoids不会在焊接过程中立刻出现,但是会因为高温老化或是高温循环而出现.真正的根源仍在调查中,但是Kirkendall微孔形成机制可能在其中扮演了一部分的角色.这些Void会影响锡球的可靠度,举个特别的例子来说,这些Void会在IMC层中成为摔落或冲击测试时粒子破裂的起始点. Pinhole Voidsare caused by pinholes in the copper lands of the PCB
15、. With sufficient quantity, they can affect solder joint reliability Pinhole Voids是因为PCB板铜面上的针状凸点或凹陷造成.如果数量够多的话,会影响到锡球的可靠度,Voids classification in IPC-7095B,When there is more than one void per solder ball, the dimensions of the voids will be added to calculate the total voiding in that solder ball.
16、 如果锡球中的气泡多于一个,则气泡尺寸的计算必须根据所有气泡的尺寸来加总,In regard to voids and the percentage of voids within the ball, location of the voids is of greater concern. There is no evidence or empirical data that indicates that voids within the ball will cause failure. Voids at the interface between the ball-and-package s
17、ubstrate as well as voids at the interface between the ball and the PCB will be more likely to contribute to solder joint cracking. This is because cracks (if they occur) will typically occur at the interface and the void or voids can provide (in time) a path to accelerate the cracking condition.,相对
18、于对Void本体及Void在锡球中的大小, Void的Location才是比较需要在意的.目前并没有证据或是经验值可以指出在锡球内的气泡会导致失效发生.但是生成在芯片封装底层跟锡球间与锡球跟PCB板之间的Voids比较可能使得锡球破裂.这是因为裂痕(如果有的话)通常会出现在接口层或是气泡上,亦或是由气泡提供了一个可以使破裂情况加速的途径,Intel JG Fab B Socket H X-section,Shrinkage Voids,Intel JG Fab B Socket H X-section + PCH D&P,Planar Microvoids,Comparison between
19、 Different Suppliers: Fab A,Ellington BTHC9350000E,在Fab A,不同的Vendor所呈现的气泡模式中,即可发现BTC与E&E不同,但也都出现在最具威胁性的IMC层上,Comparison between Different Suppliers: Fab B,在Fab B时, E&E的气泡有了大幅度的改善,但是BTC的问题反而更加突显了出来,Comparison between Different Suppliers: Fab C,在Fab C时,E&E跟BTC的气泡问题,都获得了很大的改善,BTC BTJG9490001N,E&E BTJG9
20、490001V,E&E BTJG9490003N,Intel observed planar micro voids in 2005,Intel在2005年就已经在化银板上发现了一样的现象,并且对形成机制做了研究,Intel observed planar micro voids in 2005,Intel认为这类型的Void将会对可靠度造成影响,Conclusions,制程改变已可以改善气泡问题，特别是在E&E的板子上。在Fab B时IMC层就已经见不到气泡，主因是气泡有足够的时间利用溶融锡的浮力上漂。 在Fab B时制程的改变，在BTC的板子上所产生的变化是IMC层上气泡变小，使得气泡总直径有机会低于锡球直径的25%。而在Fab C时，IMC层上也几乎已经见不到气泡。 Fab A - Fab B - Fab C制程做了怎样的修改，需要工厂协助说明。 BTC板材上的气泡模式，与Intel所发现的状况相同，可能是银在沉积过程中出现部份不完整的区域，使得银与铜有机会因为电位差产生微电池来腐蚀铜箔，形成铜箔上的陷穴。而此陷穴，将导致IMC层上出现对寿命最具威胁的Planar Microvoids，但是似乎可以用制程的改善，来将气泡移向锡球中较不具威胁的位置。,