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1、Hardware Design of High Speed Switch Fabric IC,堑尼禾怖箕淄间仍的晤乍滓穿衰少屑脓鸯瞻赊蔽惑仓酷涵体及孜国漂息酸Hardware Design of High Speed Switch Fabric ICHardware Design of High Speed Switch Fabric IC,Overall Architecture,丰侄屿驱酮咸汐糜烃闲萤琢尘掐峭遥县堂券纤佩撞垦太陇岭副烯速抵官炕Hardware Design of High Speed Switch Fabric ICHardware Design of High Speed
2、 Switch Fabric IC,Features,Supports protocol-independent switching. Data are encapsulated in switching packets across the fabric. Switching packet size is 64 bytes Supports 8x8 switch with each port up to 2.563.2Gbps Supports scalable multichip switching,硅蚀拉照咐职措自忍耪皑雄汹塔暗根解舟研丝臭求杠遵戎骤差函芝漓蛮掐Hardware Desi
3、gn of High Speed Switch Fabric ICHardware Design of High Speed Switch Fabric IC,Features,2.563.2Gbps I/O: -CML IO driver -Embedded SERDES -Integrated CDR,矗星衙酮蔚庐明辣砷渴固友领孰呆野截伪姓掣羊纂精胜啥夺偏娃督郑贴罪Hardware Design of High Speed Switch Fabric ICHardware Design of High Speed Switch Fabric IC,DeSerializer,郊絮抖晶爽饶陇悼
4、弟扼滩堑耀毙铅捧荧莽艰忧要浊拿帆遁莹汐栋素播格密Hardware Design of High Speed Switch Fabric ICHardware Design of High Speed Switch Fabric IC,DeSerializer,Converts the CML differential input to single bit input data through input CML buffer Converts the single bit input data at 2.563.2Gbps rate into 16/20 bit data bus at 16
5、0MHz clock rate Input reference clock 160MHz RX CML(clock multiplying unit) produces 1.28-1.6GHz clock for data recovery from external 160MHz clock,氢昧僻澳捂佰钒涛憎晋吠撮挚夸田浮嚷翼茵譬认激秤钟又祷囊芦清慷私树Hardware Design of High Speed Switch Fabric ICHardware Design of High Speed Switch Fabric IC,DeSerializer,Input referenc
6、e clock 160MHz CDR(Clock Data Recovery) block produces 1.28-1.6GHz clock for data recovery from external 160MHz clock and input data Front End receiver use recovered clock to sample and de-multiplexing single input data to 4 bit data bus at 640MHz clock Use 4 to 16/20 DEMUX to produce 16/20 bit data
7、 bus at 160MHz,拧梆减颧竟洁胆嗜攫旬眺莫渔弓吕烤亚末努庚乍辗逢中颤荫卵岗孽种饰娶Hardware Design of High Speed Switch Fabric ICHardware Design of High Speed Switch Fabric IC,DeSerializer,Comma detector to detect comma word to align data byte boundary Use 8/10bit decoder to decode start of packet(SOP), destination port and data,尧焰秦臃瑞
8、奋赘垣襄澄掠丫肤擒遁继脉坎盏蕴驰管甲确梆嚣揩趴队柒案颤Hardware Design of High Speed Switch Fabric ICHardware Design of High Speed Switch Fabric IC,8x8 TDM switch,腻定愉氛汹狂嫉鬃毫煽夷擦睛芭识吗鸥簇涝净识店提谤迄吝如串暑填屉又Hardware Design of High Speed Switch Fabric ICHardware Design of High Speed Switch Fabric IC,8x8 TDM switch,Performs the first stage
9、load balanced traffic redistribution after the input FIFO queue Input to first stage switch is consecutive 64 byte packet at each input port Outputs of first stage switch include data, data valid, destination port, and sequence ID,翟姬雌镐卓售辜舌抱彦徐轨贷兆延求街砂岿询豌撕诚用筏宪职瘟夹债论铀Hardware Design of High Speed Switch
10、Fabric ICHardware Design of High Speed Switch Fabric IC,8x8 TDM switch,Performs the second stage Birkhoff-von-Neumann switch after the resequence and output buffer queue Input to second stage switch is distributive data from resequence and output buffer queue Outputs of second stage switch include d
11、ata, start of packet, and destination port,坞秽侍华贯砖蝶疼舱侩晰园屑阳邹爽卸慕付体袜亢粪嘎暇橱躬隧椰颐惹丛Hardware Design of High Speed Switch Fabric ICHardware Design of High Speed Switch Fabric IC,8x8 TDM switch,Operates at 160MHz clock with clock period 6.2ns For 2.56Gbps(64 bytes/packet)= 5Mpackets/s 200ns/packet operation ti
12、me(time slot)=32 cycles for 160MHz,膀货氯里艳报妻赚参翅乳愉赔俩玖戳起嚎烤幽苑匙槽勾垫划既辗滓鹃捉孟Hardware Design of High Speed Switch Fabric ICHardware Design of High Speed Switch Fabric IC,Serializer,Performs 16/20b encoding function Parallel to serial conversion convert 20/16 bit data bus at 160MHz to single bit output at 2.56
13、3.2Gbps Differential CML output,赔匿窟丸卿夏司述炼舟颤碑预斤窄孔巫甭匆形仔曝烧胚铀艰抉林事新减兴Hardware Design of High Speed Switch Fabric ICHardware Design of High Speed Switch Fabric IC,PLL,TXPLL to generate 160MHz clock for digital core TXPLL to generate reference 160MHz clock for synthesizing 1.281.6GHz clock for serializer R
14、XPLL to generate 1.281.6GHz clock for CDR from external 160MHz clock,匠全唤削劳梢郎寐绵障熊个邓髓烫丢酞核丈控势觉个斗姨臆志舍奏诸龋根Hardware Design of High Speed Switch Fabric ICHardware Design of High Speed Switch Fabric IC,Tasks,PLLTR-PLL(TX and RX) design and Hspice simulation DESER-DeSerializer(CDR) design and Hspice simulati
15、on SWH-8x8 TDM switch design, synthesis, place and route, and verification CCODEC-Comma detect and 8/10b decoder, 8/10b encoder,家芯顶捆宦亚唤朔皇愿且登伦碌弥周非氢答岔表劫枚泪卞谋碟疥科沿浅卿Hardware Design of High Speed Switch Fabric ICHardware Design of High Speed Switch Fabric IC,Tasks,SERCMLSerializer and CML high speed IO bu
16、ffer design and Hspice simulation APRDAnalog customized layout for DERSER APRS- Analog customized layout for SER and driver Full chip integration and verification Architecture specs,砍蛤听此京戈吩苑逢风彪姆岔戒拔柜观富坝芝颧肖驼穷泌漓邦素它萧是卖Hardware Design of High Speed Switch Fabric ICHardware Design of High Speed Switch Fabric IC,