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1、DRAFT FOR DEVELOPMENT DD IEC/PAS 62588:2008 Marking and labeling of components, PCBs and PCBAs to identify lead(Pb), Pb-free and other attributes ICS 31.190 ? Licensed Copy: London South Bank University, South Bank University, 16/11/2008 12:15, Uncontrolled Copy, (c) BSI DD IEC/PAS 62588:2008 This D
2、raft for Development was published under the authority of the Standards Policy and Strategy Committee on 31 October 2008 BSI 2008 ISBN 978 0 580 64571 6 National foreword This Draft for Development is the UK implementation of IEC/PAS 62588:2008. This publication is not to be regarded as a British St
3、andard. It is being issued in the Draft for Development series of publications and is of a provisional nature. It should be applied on this provisional basis, so that information and experience of its practical application can be obtained. A PAS is a Technical Specification not fulfilling the requir
4、ements for a standard, but made available to the public and established in an organization operating under a given procedure. A review of this Draft for Development will be carried out not later than three years after its publication. Notification of the start of the review period, with a request fo
5、r the submission of comments from users of this Draft for Development, will be made in an announcement in the appropriate issue of Update Standards. According to the replies received, the responsible BSI Committee will judge whether the validity of the PAS should be extended for a further three year
6、s or what other action should be taken and pass their comments on to the relevant international committee. Observations which it is felt should receive attention before the official call for comments will be welcomed. These should be sent to the Secretary of the responsible BSI Technical Committee a
7、t British Standards House, 389 Chiswick High Road, London W4 4AL. The UK participation in its preparation was entrusted to Technical Committee EPL/501, Electronic assembly technology. A list of organizations represented on this committee can be obtained on request to its secretary. This publication
8、does not purport to include all the necessary provisions of a contract. Users are responsible for its correct application. Amendments/corrigenda issued since publication DateComments Licensed Copy: London South Bank University, South Bank University, 16/11/2008 12:15, Uncontrolled Copy, (c) BSI IEC/
9、PAS 62588 Edition 1.0 2008-09 PUBLICLY AVAILABLE SPECIFICATION Marking and labeling of components, PCBs and PCBAs to identify lead(Pb), Pb-free and other attributes DD IEC/PAS 62588:2008 Licensed Copy: London South Bank University, South Bank University, 16/11/2008 12:15, Uncontrolled Copy, (c) BSI
10、blank Licensed Copy: London South Bank University, South Bank University, 16/11/2008 12:15, Uncontrolled Copy, (c) BSI IPC/JEDEC J-STD-609 PCBs and PCBAs to Identify Lead(Pb), A joint standard developed by the Marking, Symbols and Labels for Identifi cation of Assemblies, Components and Devices Task
11、 Group (4-34b) and JEDEC Committee JC14.4 Quality Processes and Methods Users of this publication are encouraged to participate in the development of future revisions. Contact: JEDEC Solid State Technology Association 2500 Wilson Boulevard Arlington, VA 22201-3834 Tel 703 907.7500 Fax 703 907.7501 I
12、PC 3000 Lakeside Drive, Suite 309S Bannockburn, Illinois 60015-1249 Tel 847 615.7100 Fax 847 615.7105 Supersedes: JESD97 - May 2004 IPC-1066 - January 2005 ASSOCIATION CONNECTING ELECTRONICS INDUSTRIES Pb-Free and Other Attributes Marking and Labeling of Components, DD IEC/PAS 62588:2008 Licensed Co
13、py: London South Bank University, South Bank University, 16/11/2008 12:15, Uncontrolled Copy, (c) BSI ii Copyright 2007, IPC/JEDEC; 2008, IEC Table of Contents IPC/JEDEC Foreword. v IEC Foreword.vii 1 SCOPE1 1.1 Purpose 1 2 REFERENCE DOCUMENTS .1 2.1 IPC 1 2.2 JEDEC 1 2.3 IEC 1 2.4 European Parliame
14、nt 1 2.5 ANSI .1 3TERMS AND DEFINITIONS .1 3.1 2D Code Label (Matrix) .1 3.2 2 Li (or 2LI) .1 3.3 2 nd Level Interconnect .2 3.4 2 nd Level Interconnect Component Label 2 3.5 2 nd Level Interconnect Terminal Finish or Material .2 3.6 Component .2 3.7 Base Materials.2 3.8 Halogen-Free Board .2 3.9 Ho
15、mogeneous Material .2 3.10 intct (or INTCT) .2 3.11 Linear Bar Code Label 2 3.12 Material Category 2 3.13 Maximum Component Temperature .2 3.14 Pb-Free .2 3.15 Pb-Free Symbol 2 4 SYMBOLS, LABELS AND MARKS2 4.1 Material Category Symbol 2 4.1.1 Size and Location .2 4.1.2 Color2 4.1.3 Font 2 4.2 Pb-Fre
16、e Symbol.2 4.3 2 nd Level Interconnect Component Label 3 4.3.1 Size3 4.3.2 Color .3 5 MARKING/LABELING CATEGORIES .4 5.1 PCB Base Material Categories 4 5.1.1 Halogen-Free Base Material .4 5.2 PCB Surface Finish Categories .4 5.2.1 Pb-Containing . 4 5.2.2 Pb-Free .4 5.3 2 nd Level Interconnect Catego
17、ries .4 5.3.1 Pb-Containing . 4 5.3.2 Pb-Free .4 5.4 Conformal Coating Categories 4 6COMPONENT MARKING AND LABELING .4 6.1 Component Marking 4 6.2 Lowest Level Shipping Container Labeling . 4 7PCB/ASSEMBLY MARKING AND LABELING.5 7.1 PCB Marking5 7.1.1 PCB Shipping Container Labeling .5 7.2 Assembly
18、Marking .5 7.2.1 Assembly Shipping Container Labeling5 7.3 Solder Category Marking Sequence . 5 7.4 Location .5 7.5 Size .5 7.6 Color .5 7.7 Font .5 7.8 Method 5 7.9 Marking Sequence 5 7.10 Re-Marking Changes in PCBA Materials . .6 8 MARKING AND/OR LABELING OF LEAD (Pb)-CONTAINING COMPONENTS, PCBs,
19、AND PCB ASSEMBLIES 6 8.1 Marking and Labeling of Components6 8.2 Marking and Labeling of PCBs.6 8.3 Marking and Labeling of PCB Assemblies . 6 9 SUMMARY OF MARKING AND LABELING REQUIREMENTS 7 Annex A Acknowledgment8 IPC/JEDEC J-STD-609May 2007 DD IEC/PAS 62588:2008 Licensed Copy: London South Bank U
20、niversity, South Bank University, 16/11/2008 12:15, Uncontrolled Copy, (c) BSI Figures Figure 3-1Examples of Materials that Comprise the 2nd Level Interconnect . 2 Figure 4-1Example of Mark Indicating Material Category e2 and the Optional Circle, Ellipse, Underline or Parentheses 2 Figure 4-2Pb-Free
21、 Symbol 3 Figure 4-3Example of 2ndLevel Interconnect Component Label Indicating a Pb-Containing Material 3 Figure 4-4Example of 2ndLevel Interconnect Component Label Indicating a Pb-Free e2 Material with a Maximum Component Temperature of 260C 3 Figure 4-5Example of 2ndLevel Interconnect Component L
22、abel Utilizing the Lead Free Symbol Indicating Both Pb-Free Material with Category and Maxi- mum Component Temperature Indicated on an Adjacent Label 3 Figure 6-1Example of Component Marking 5 Figure 7-1Example of Board/Assembly Markings . 6 Tables Table 9-1Marking and Labeling Summary . 7 IPC/JEDEC
23、 J-STD-609May 2007 iii Copyright 2007, IPC/JEDEC; 2008, IEC DD IEC/PAS 62588:2008 Licensed Copy: London South Bank University, South Bank University, 16/11/2008 12:15, Uncontrolled Copy, (c) BSI IPC and JEDEC Standards and Publications are designed to serve the public interest through eliminating mi
24、sunderstandings between manufacturers and purchasers, facilitating interchange- ability and improvement of products, and assisting the purchaser in selecting and obtaining with minimum delay the proper product for his particular need. Existence of such Standards and Publications shall not in any res
25、pect preclude any member or nonmember of IPC or JEDEC from manufacturing or selling products not conforming to such Standards and Publications, nor shall the existence of such Standards and Publications preclude their voluntary use by those other than IPC or JEDEC members, whether the standard is to
26、 be used either domestically or internationally. Recommended Standards and Publications are adopted by IPC or JEDEC without regard to whether their adoption may involve patents on articles, materials, or processes. By such action, IPC or JEDEC do not assume any liability to any patent owner, nor do
27、they assume any obligation whatever to parties adopting the Recommended Standard or Publication. Users are also wholly responsible for protecting themselves against all claims of liabilities for patent infringement. The material in this joint standard was developed by the Marking, Symbols and Labels
28、 for Identifi cation of Assemblies, Components and Devices Task Group (4-34b) of the Materials Identifi cation Subcommittee (4-34). For Technical Information Contact: JEDEC Solid State Technology Association 2500 Wilson Boulevard Arlington, VA 22201-3834 Phone (703) 907-7560 Fax (703) 907-7501 IPC 3
29、000 Lakeside Drive, Suite 309S Bannockburn, Illinois 60015-1249 Tel 847 615.7100 Fax 847 615.7105 Copyright 2007 The Electronic Industries Alliance, Arlington, Virginia, and the IPC, Bannockburn, Illinois. All rights reserved under both international and Pan-American copyright conventions. Any copyi
30、ng, scanning or other reproduction of these materials without the prior written consent of the copyright holder is strictly prohibited and constitutes infringement under the Copyright Law of the United States. iv Copyright 2007, IPC/JEDEC; 2008, IEC IPC/JEDEC J-STD-609May 2007 DD IEC/PAS 62588:2008
31、Licensed Copy: London South Bank University, South Bank University, 16/11/2008 12:15, Uncontrolled Copy, (c) BSI IPC/JEDEC FOREWORD Directive 2002/95/EC of the European Parliament and of the Council on the restriction of the use of certain hazardous sub- stances in electrical and electronic equipmen
32、t, commonly referred to as the RoHS Directive1, and other legislation are driving the electronics industry towards the use of lead free (Pb-free) solders and components with Pb-free 2ndlevel inter- connect terminal fi nishes and materials. There are different Pb-free solders being used for the vario
33、us soldering operations in electronics. Each of these solders may require different processing temperatures for assembly, rework, and repair. Some means of communicating the identity of the Pb-free or Pb-containing solder must be provided so that those performing assembly, rework and repair are awar
34、e of the temperature capabilities and limitations of these solders, and are able to distinguish between Pb-free and Pb-containing sol- ders. Marking of components and/or labeling their shipping containers are needed to identify and distinguish Pb-containing and Pb-free 2nd level interconnect termina
35、l fi nishes and materials. Labeling electronic assemblies using Pb-free solder materials will facilitate end-of-life recycling of electronic equipment. This standard sets forth minimum requirements and includes options for the provision of additional information. This paradigm shift to Pb-free elect
36、ronics has created a need for identifi cation of traditional Pb-containing coatings, fi nishes and solders. This standard can be utilized to identify the presence of lead (Pb) for those markets as described in Clauses 5 (Marking/Labeling Categories) and 8 (Marking and/or Labeling of Pb-Containing Co
37、mponents, PCBs, and PCB Assem- blies). This standard supersedes JESD97 and IPC-1066. 1. The RoHS Directive itself is not a law; rather, it is a direction to the European Union Member States to implement their own laws embodying the requirements of the Directive. These laws were required to be in eff
38、ect as of July 1, 2006. v Copyright 2007, IPC/JEDEC; 2008, IEC IPC/JEDEC J-STD-609May 2007 DD IEC/PAS 62588:2008 Licensed Copy: London South Bank University, South Bank University, 16/11/2008 12:15, Uncontrolled Copy, (c) BSI This Page Intentionally Left Blank vi Copyright 2007, IPC/JEDEC; 2008, IEC
39、 IPC/JEDEC J-STD-609May 2007 DD IEC/PAS 62588:2008 Licensed Copy: London South Bank University, South Bank University, 16/11/2008 12:15, Uncontrolled Copy, (c) BSI PAS 62588 IEC:2008(E) INTERNATIONAL ELECTROTECHNICAL COMMISSION _ Marking and Labeling of Components, PCBs and PCBAs to Identify Lead(Pb
40、), Pb-Free and Other Attributes FOREWORD 1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising all national electrotechnical committees (IEC National Committees). The object of IEC is to promote international co- operation on all questions
41、concerning standardization in the electrical and electronic fields. To this end and in addition to other activities, IEC publishes International Standards, Technical Specifications, Technical Reports, Publicly Available Specifications (PAS) and Guides (hereafter referred to as “IEC Publication(s)”).
42、 Their preparation is entrusted to technical committees; any IEC National Committee interested in the subject dealt with may participate in this preparatory work. International, governmental and non-governmental organizations liaising with the IEC also participate in this preparation. IEC collaborat
43、es closely with the International Organization for Standardization (ISO) in accordance with conditions determined by agreement between the two organizations. 2) The formal decisions or agreements of IEC on technical matters express, as nearly as possible, an international consensus of opinion on the
44、 relevant subjects since each technical committee has representation from all interested IEC National Committees. 3) IEC Publications have the form of recommendations for international use and are accepted by IEC National Committees in that sense. While all reasonable efforts are made to ensure that
45、 the technical content of IEC Publications is accurate, IEC cannot be held responsible for the way in which they are used or for any misinterpretation by any end user. 4) In order to promote international uniformity, IEC National Committees undertake to apply IEC Publications transparently to the ma
46、ximum extent possible in their national and regional publications. Any divergence between any IEC Publication and the corresponding national or regional publication shall be clearly indicated in the latter. 5) IEC provides no marking procedure to indicate its approval and cannot be rendered responsi
47、ble for any equipment declared to be in conformity with an IEC Publication. 6) All users should ensure that they have the latest edition of this publication. 7) No liability shall attach to IEC or its directors, employees, servants or agents including individual experts and members of its technical
48、committees and IEC National Committees for any personal injury, property damage or other damage of any nature whatsoever, whether direct or indirect, or for costs (including legal fees) and expenses arising out of the publication, use of, or reliance upon, this IEC Publication or any other IEC Publi
49、cations. 8) Attention is drawn to the Normative references cited in this publication. Use of the referenced publications is indispensable for the correct application of this publication. 9) Attention is drawn to the possibility that some of the elements of this IEC Publication may be the subject of patent rights. IEC shall not be held responsible for identifying any or all such patent rights. A PAS is a technical specification not fulfilling the requirements for a standard but